Xilinx Archives - 4DSP | Embedded Systems Blog

16 Jun

4DSP Compact Embedded System Performance Boosted by UltraScale and SDAccel

We recently announced two new additions to our innovative compact embedded system (CES) product line. The CES820 and ruggedized CESCC820 both benefit from powerful new Kintex UltraScale FPGAs supplied by longtime 4DSP partner Xilinx, and they offer support for the most recent version of Xilinx’s SDAccel development environment for OpenCL™, C, and C++. While the CES820 features the same durable aluminum enclosure as the CES720, which 4DSP introduced in 2014 to much enthusiasm from our customers, it represents a step forward in performance for the CES line.

The CESCC820 goes even further by providing a conduction-cooled and more vibration-resistant chassis, as well as military-grade Meritec connectivity options. The more spacious, yet still compact enclosure offers the choice to install more than one FPGA Mezzanine card (FMC) inside as a build option. These attributes make the ruggedized model an ideal choice for a wide range of deployed embedded aerospace and defense applications where Size, Weight, and Power (SWaP) are critical and more demanding IO or DSP requirements are called for.

Both CES820 versions have a quad-core, low-power Intel Atom CPU that is tightly coupled to the FPGA, making them perfect for handling the high-level programmability necessary to perform anti-jamming, compression, encryption, high-performance signal processing for such applications as communication signal analysis. The full list of features, data sheets, block diagrams, and additional photos of these systems can be found on their respective product pages: CES820 and CESCC820.

FMC modules for these systems can be selected from 4DSP’s extensive and diverse portfolio or from a third-party vendor enabling extensive functional customization using VITA 57.1-compatible FPGA mezzanine cards. The 4DSP Board Support Package (BSP) and StellarIP firmware tool and library are included with these systems. These intuitive tools allow designers to jump into development with modular reference designs that exercise the systems’ capabilities and provide high-level interfaces and driver support.

These systems support the Xilinx SDAccel FPGA development environment. The newest version of SDAccel (2015.1) offers enhancements that make the Eclipse-based integrated development environment easier to use as a result of new debug and profiling features that speed the development and deployment of OpenCL, C, and C++ kernels. This release also builds on SDAccel’s Khronos standard compliance, supporting a new OpenCL Installable Client Driver (ICD). The ICD extension allows multiple implementations of OpenCL to co-exist on the same system, giving applications developers the ability to choose between CPUs, GPUs and FPGAs in real-time. This accelerates run time and results in power savings.

Looking ahead, as an SDAccel development environment-certified Xilinx Alliance Member, 4DSP’s future FPGA-based board and system-level products will also support SDAccel as part of our continuing effort to give system designers the very best tools for efficiently achieving great results.

26 Mar

4DSP’s New FPGA-based Products Benefit from Xilinx UltraScale

4DSP is using the newest and most powerful g Kintex UltraScale detail eneration of Xilinx FPGAs in its most recent products. The basic logic cell structure of these UltraScale devices remains essentially unchanged and the available resources on the chip are largely what you would expect – LUTs, Memory, DSP blocks, standard IOs, and SerDes transceivers. Xilinx has, however, fine-tuned these resources specifically for the increasingly demanding applications that designers face. As a close partner of Xilinx, 4DSP immediately began developing products to take advantage of the performance gains offered by these new devices and we introduced our first UltraScale-based product in December. 4DSP now offers Kintex UltraScale FPGAs on our three newest PCIe boards.

PC820 – carrier card with 1x FMC (VITA 57.1) site

PC821 – carrier card with 2x FMC (VITA 57.1) sites

PC870 – one 10-bit A/D ch. at 5Gsps and one 10-bit D/A ch. at 5Gsps

UltraScale FPGAs are designed for applications that require massive I/O and memory bandwidth, huge data flow, and excellent DSP and packet-processing performance. The 20nm UltraScale architecture provides a number of advantages over Xilinx’s previous highest-end Kintex-7 and Virtex-7 28nm FPGA families, the largest of which are capable of holding the equivalent of up to 20 million ASIC gates. UltraScale offers a significant performance boost over this with the equivalent of 50 million ASIC gates, while reducing power consumption. The design also addresses the scalability limitations of system throughput and latency, and it improves communication, clocking, and critical paths to accommodate greater data flow. UltraScale also offers more and faster interconnects to minimize the bottleneck to silicon performance at advanced nodes. The increased number of routing resources improves handling of the large amount of data that current high-speed SerDes can deliver to these programmable devices.

Comparison of the Maximum Values of 20nm and 28nm Devices (Xilinx)

The revamped clocking architecture on UltraScale chips uses a multi-region scheme reminiscent of ASIC designs. In this way, Xilinx greatly reduces the large portion of a clock period that is lost to skew. UltraScale devices additionally now support higher-resolution clock gating to enable ASIC-like power conservation. This results in higher-frequency operation, a reduction in timing problems caused by skew, lower power requirements, and higher overall bandwidth.

Working hand-in-hand with UltraScale devices is Xilinx’s Vivado Design Suite, an integrated design environment developed to support these newer, high-capacity FPGAs. Vivado is an IP and system-centric software tool that reduces the amount of time necessary to design programmable logic and I/O. It is a ground-up rewrite of their older design tool, ISE. 4DSP’s own StellarIP firmware design tool and proven reference design library supports both Vivado and ISE and can be used to automatically create compatible projects. StellarIP is part of the Board Support Package (BSP) included with all 4DSP FPGA-based boards and FMCs. The BSP also includes the 4FM GUI (multifunction test, monitoring and measurement tool) and the Data Analyzer (real-time digitized data and spectrum display tool).

4DSP is developing more new products that feature UltraScale processing, including a more advanced version of our popular CES720 (Compact Embedded System). These will be announced later this year, so keep an eye out here and in our press area for new developments.

13 Feb

New 4DSP White Paper Roundup

4DSP has added a few new white papers to our website to provide more information about some of our products and elaborate on the functional advantages of the technologies and standards they are based upon. We also highlight some of the challenges inherent to several applications and demonstrate how our boards, backplanes and systems can help you achieve a successful design while minimizing both costs and development times.

The product page for our compact and highly adaptable line of FlexVPX 3U VPX-compliant backplanes now features a paper outlining the benefits of this innovative design for VPX systems and some context about the growth of the OpenVPX (VITA 65) standard for systems development. The paper features a contribution from the US Naval Research Laboratory, where the FlexVPX concept was developed as a way to reduce the Size, Weight and Power (SWaP) of embedded systems using two and three-slot backplanes that allow for backplane functionality to be subdivided across several smaller boards. This increases flexibility in the physical packaging of system processing hardware to accommodate the limited physical space available in many military and commercial systems.

VPB601 VPX backplane

To support our FMCs (FPGA mezzanine cards) that make use of the JESD204B serial interface standard, another white paper is available on the product pages for the FMC144, FMC142, FMC140, and FMC176 modules. JESD204B offers a reliable, efficient and flexible alternative to the typical LVDS and CMOS interfaces used between FPGA or DSPs and data converters. It reduces the number of interconnects required to interface high-speed (>10 Msps) ADC and DAC converters on an FMC to an FPGA on a carrier card. This makes it possible to design for smaller form factors while maintaining system performance.

Typical ADC to FPGA Configurations Using JESD204B (source: Xilinx)

Typical ADC to FPGA Configuration Using JESD204B (source: Xilinx)

Multi-antenna array (photo Gareth Ellner)

We look at the topic of using FPGAs for beamforming in wireless telecommunications and radar applications in the FPGAs for Better Beamforming Performance paper featured on many of the pages for products that are well suited for beamforming, including the Xilinx Virtex-7-based FM788 and the FMC168.

The heavy computational loads and very high bandwidth required to digitally process signals in real time can quickly overtax traditional CPUs and DSPs when used in adaptive beamforming for mobile networks. Much higher performance FPGAs, on the other hand, are ideal for this purpose due to their embedded DSP blocks, parallel processing architecture, and enhanced memory capabilities. FPGAs similarly offer a big advantage over CPU and GPU options in radar systems that employ advanced digital beamforming techniques because they can reduce, cost, complexity, and power consumption.

The VPX for System Development white paper looks at the cost benefits of using the VPX standard (VITA 46) when designing high-performance, rugged embedded systems for aerospace and defense applications involving high-frequency signals. It is available on the product pages for our 3U VPX FPGA carrier cards, such as the VP780, and our VPX systems, including the VPX360.

VPX360 Desktop VPX System

The paper outlines the advantages of using designs centered on FPGAs and FMCs to improve project risk management and reduce time-to-market. The OpenVPX ecosystem offers flexibility and performance when planning new designs. It is effective for system upgrades and technology insertion, and it simplifies the incorporation of new technologies such as higher resolution A/Ds and D/As as they become available.

More white papers are in the works on other topics and technologies, so stay tuned!

06 Jan

Comprehensive Support is Part of the 4DSP Advantage

Many technology products are commodity goods that adhere to standards and deliver the performance they advertise. When it comes to the high-speed data acquisition and FPGA world, however, it’s a mixed bag of performance. Most products on the market look fine from a distance, but there can be a lot of room for disappointment upon closer inspection in the absence of a unified standard. The devil, as always, is in the details.

4DSP strives to promote, deliver and support its products in a transparent fashion so that there is no confusion about their capabilities. As part of this effort, we thoroughly test each board and system we sell to eliminate surprises for the end user. We also publish performance reports in which we share the results of tests for the noise, distortion, bandwidth, and offset performance of the ADCs and DACs used on our modules. This helps to reduce risk for our clients and to demonstrate that signal integrity is our top priority.

FMC144 ADC Bandwidth

ADC Bandwidth Performance (all channels) of the FMC144

4DSP adds value to the hardware that we deliver with our Board Support Package for Windows and Linux which contains reference designs for FMC (FPGA Mezzanine Card), FPGA carrier card and system level products. These serve as a baseline with all communication layers already implemented, so customers can build upon the designs as they customize for their specific applications.

Also included in the Board Support Package is our intuitive tool flow that gives engineers of various skill levels the ability to begin working with 4DSP products immediately upon delivery. StellarIP, the flagship application, streamlines the FPGA firmware development process by offering automated code and bitstream generation functions in an intuitive graphical interface. The StellarIP concept identifies IP blocks as stars that can be combined using channels known as wormholes to form top-level designs called constellations. It enables firmware designers to remove repetitive and error-prone tasks from their workflow and to automatically create top level files and manage clock domain crossings to expedite the creation of complex designs for programmable devices.

FMC144 Firmware Workflow2 4DSP Firmware compilation chain

4DSP additionally offers a multi-function tool called the 4FM GUI for monitoring voltage and temperature, performing memory tests, measuring PCIe bandwidth, and updating FPGA firmware. Also included is the Data Analyzer application which displays real-time digitized data and spectrum analysis. It is effectively an oscilloscope and spectrum analyzer in one simple tool.

Of course, it is also possible to receive more in-depth support directly from 4DSP engineers through the technical support forum, and all 4DSP products are complemented by extensive documentation. Support documents include user manuals, application notes, getting started guides and other instructional documents targeting specific use cases. We are always adding new step-by-step descriptions of how to configure fully-functional firmware designs from 4DSPs StellarIP library for hardware such as host interfaces, memory controllers, and FMC Board Controllers. We also provide tutorials on topics such as how to reuse existing StellarIP designs in your own AXI environment.

4DSP On Time Delivery Score 2014

This commitment to ensuring that those who choose 4DSP products get what they expect every time pays off in a measurable way. We closely monitor our on-time delivery (OTD) and returned merchandise authorization (RMA) statistics while endeavoring to keep the results on target toward aggressive performance goals. 4DSP is working on an initiative to share our OTD and RMA data to openly illustrate how this drives our consistently high customer satisfaction scores.

14 Aug

The 4DSP CES720 is ideal for FMC Deployment

4DSP CES720

We are proud to highlight here in Austin the recent release of a new Compact Embedded System that is ideal for prototyping and development of high-speed data acquisition solutions. It is designed to serve as an embedded platform for deployment in UAVs or other applications with stringent size and weight requirements (SWaP-C). Known as the CES720, this small form factor, stand-alone system provides a complete and generic processing platform for data acquisition, signal processing, and communication.

The system is notable for both the performance it can deliver and its small size. Housed in an enclosure measuring about five inches square and three inches high, the highly portable CES720 weighs less than one kilogram. It features a low-power x86 CPU that is tightly coupled to a high-performance Xilinx Kintex-7 410T FPGA. This combination provides a flexible and powerful processing backbone for interfacing to the FMC site, CPU, and external DDR3 SDRAM, with plenty of room left over for Digital Signal Processing (DSP).

FMC inside CES720

The flexibility of the CES720 allows users to customize the IO and DSP functionality of the system for a wide range of uses by choosing the FMC that best suits their needs. A removable panel on top of the enclosure allows easy access for installing an FMC chosen from 4DSP’s selection of 25 different modules. Alternatively, any one of a growing number of VITA 57.1-compatible cards from different vendors (more than 100, according to the VITA Standards Organization) can be installed in the CES720. The modularity of using FMCs with an FPGA carrier opens up opportunities to tailor a system for such applications as software-defined radio (SDR), beamforming, RADAR, and medical imaging among others.

Currently available as an air-cooled unit, the CES720 will also be released as a conduction-cooled Small Form Factor (SFF) solution later this year. Based on the emerging VITA 75 standard, the upcoming ruggedized version will be suitable for many applications where payload is limited. We will post more information about the new system here in the coming months.