Dear Ingmar and Erik,
Thaks very much for your advice and sorry for keeping you wait for a while. My team just checked on what you suggested. We reduce the amplitude level to 2 Volts, but with the frequency of 21 kHz trigger input. You can see from the diagram.pdf file I attach here. The outcome is still the same (it still does not work). In the test we did not change any steps in the software (i.e., configurerouter, ctrl_enable_channel, ctrl_set_trigger_source, ctrl_arm, and sipif_readdata, respectively....from the pdf file shown here). By the way, for your information, my colleague use the Xilinx ML605 (Virtex-6) board for the carrier board.
I also have a question on IOSTANDARD of the hardware trigger input. We still use the same IOSTANDARD for the trigger input given in the vhdl files (project) generated by stellar IP. I attach 2 jpeg-files here which are captured from fmc168 datasheet. So, the FMC168 board already converts the single-ended trigger input to the LVDS input supplied to the FMC connector on the ML605, right ?
We also have a couple more questions.
1) Do we need any interrupt service routine before reading the data in the software part?
2) Does Burst Size play any important role related to External Trigger? In the test, my colleague used a Burst Size = 2x1024 (for the hardware trigger). He also tried with the software trigger (by disabling the hardware trigger) and reduced the burst size. He found that if the Burst Size = 1 or 2, the communication with the device cannot be achieved. If the Burst Size = 4 or more (still using the software trigger), there is no problem.
I hope this would help you see the picture we have been testing. Thank you very much for your time spent with us. We still look forward to receiving your suggestions again.
Best Regards,
Roengrut