Hello,
I am trying to analyse the adc0_par signal of the fmc110 core using the chipscope pro tool of Xilinx. I am sampling this signal at 125MHz clock, but the output is not uniform.
We are giving the input sin wave from 1MHz to 60MHz frequency but the output has some jitters in it at irregular intervals.
Kindly tell me the frequency at which adc0_par signal is generated, also the clock synchronized with this signal.