Dear Juergen,
If I understand correctly, you are trying to recompile the firmware and run the software from XIlinx SDK. I have been looking into the issue and there is a small issue in the software. You need to comment out some lines in sip.c, function accept_callback().
Place a #if 0 before /* send exit request */ and a #endif before /* reinit ll fifos */
#if 0
/* send exit request */
g_exitdone = 0;
g_exitreq = 1;
/* wait for stack (and its call back to be ready */
while(!g_exitdone) {
xil_printf("Waiting system to be read prior connecting, ...\r\n");
}
#endif
/* reinit ll fifos */
XLlFifo_Initialize(&g_instfifo, XPAR_AXI_FIFO_MM_S_0_BASEADDR);
The software is same between all zedboard (ZC702, ZC706 and Zedboard) besides a print difference.
This should get you going, please report back.
As a first confidence test, can you try to run the reference design (precompiled software and firmware) as per the 4FM Get Started Guide, this the way our engineer worked on that. I know my name is in the source code but I haven't worked on ZC706, I designed the ZC702 firmware/software which was reused by other engineers after.
Best Regards,
Arnaud