1&2. Having found no good way to slave the ADC to the board clock, we run the ADC at its native 245.76Ms/s and drive most of our signal path from that clock, w/ appropriate downcounted enables. Do you require precisely 20MHz, or would 245.76/8 or 245.76/16 be close enough? By using more elaborate multirate digital filters than the simple half-banders we are using, you should be able to get fairly close to 20MHz.
3. The easiest way to convert between two's complement and offset binary is simply to flip the MSB in your digital logic.