FMC125

FMC-HPC Analog-to-Digital Converter Board
Multi-Channel Multi-Mode 8-bit ADC
1.25 Gsps / 2.5 Gsps / 5.0 Gsps
FMC VITA 57.1 Compliant

Description

The FMC125 is a Quad-Channel Multi-Mode ADC FMC, fully compliant with VITA 57.1 Standards. The card provides four 8-bit ADC channels that enable simultaneous sampling of 4, 2, or 1 channel with a maximum sample rate of 1.25 GSPS (4-channel mode), 2.5 GSPS (2-channel mode), or 5.0 GSPS (1-channel mode).

The sample clock can be supplied externally through a coax connection or supplied by an internal clock source (optionally locked to an external reference). Additionally a trigger input for customized sampling control is available.

The FMC125 daughter card is mechanically and electrically compliant to the FMC standard as established by ANSI/VITA 57.1. The FMC125 has a HPC (high-pin count) 400-pin connector, front panel I/O, and can be used in a conduction cooled environment.

The design is based on the E2V Quad ADC EV8AQ160 chip-set having DDR LVDS outputs. The analog signal inputs are available on the front panel on coax connections and have individual calibration circuits for fine-tuning of gain, offset, and phase.

The FMC125 allows flexible control on clock source, sampling frequency, and calibration through the I2C serial communication bus. Furthermore the card is equipped with power supply and temperature monitoring and offers several power-down modes to switch off unused functions.

Features

• Quad – Dual – Single 8-Bit Channel Operation
  • 4-Channel 1.25 Gsps A/D conversion Mode
  • 2-channel 2.50 Gsps A/D conversion Mode
  • 1-channel 5.00 Gsps A/D conversion Mode
• VITA 57.1-2010 compliant.
• Conduction Cooled
• 1.25Gsps or 625Msps DDR LVDS outputs
• Coax front panel inputs on SSMC connectors
• Single ended AC-coupled analog input.
• Flexible clock tree enables:
  • internal clock
  • external clock
• Mil-I-46058c Conformal Coating Compliant (optional)
• HPC – High Pin Count Connector Option (400-pins)

(Click Block Diagram to Enlarge)

Support

• Stellar IP available for this product. A simple way to design FPGA firmware with automated code and bitstream generation
• ML605 reference design available.
• User Manual
• Reference firmware design (VHDL)
• Reference ISE project for Virtex-6 (ML605)
• Email support (support@4dsp.com)

Application

• Direct RF Down Conversion
• Software defined radio (SDR)
• RADAR/SONAR
• Ultra Wideband Satellite Digital Receiver
• Medical equipment
• Aerospace and test measurement instruments

Performance

• Selectable analog input range (500mVpp / 625mVpp)
• Selectable input bandwidth (500MHz / 600MHz / 1.5GHz / 2.0GHz)
• Individual Gain control (±18%)
• Individual Offset control (±50mV)
• Individual Phase control (±14ps)
• > 60dB channel isolation (crosstalk)

The FMC125 comes with an integrated Cross Point Switch allowing flexible mapping of analog inputs to the converters. Unused converters can be placed in standby mode or a full standby mode can place all channels in power saving mode.

With the build in DMUX feature of the FMC125 it is possible to adapt the digital output interface to the carrier hardware. When the DMUX feature is enabled each channel has a 16-bit Double Data Rate LVDS bus at 625Mbps (full speed sampling). Without de-multiplexing the digital output interface compromises four 8-bit DDR LVDS busses at 1.25Gbps.

Talk to us about your algorithmic requirements, 4DSP is a full-service firmware and software development house. We are specialist at high performance FFT and Video Processing. Check with us, we may have IP Cores that meet requirements for your application, right off the shelf.