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Description

The ADC224 is a 24 channel ADC daughter card compatible with the 4DSP, LLC PMC and XMC line of products. The ADC224 provides simultaneous sampling of 24 channels with 14-bit resolution at a maximum throughput rate of 250 KSPS per channel. The maximum throughput rate can be increased up to 526 KSPS when using fewer channels.

Additionally, the ADC224 provides one (1) external clock input, one (1) external trigger input, two (2) RS485 transceivers, and eight (8) bi-directional TTL compliant in-/outputs. The ADC224 daughter card is mechanically and electrically compliant to the 4DSP standard daughter card expansion I/O specifications which is an open published standard intended as a method of I/O expansion for the 4DSP series of PMC and XMC industry compliant signal processing modules.

Features

• Input voltage range
  ±5V
• Input Resistance
  8.66 kΩ (typical)
• Analog Bandwidth
  10MHz
• SFDR
  -85 dBc (at 100kHz input)
• SNR
  74 dBFS (at 100kHz input)

ADC Specifications:

• Output Data Width
  14-bit
• Data Format
  2's complement
• Conversion time
  3.7 μs (24-channel) to 1.6 μs (3-channel)
• Data Throughput
  250 Ksps (24-channel) to 526 Ksps (3-channel)
• Digital Interface Clock
  100kHz to 12.5MHz

External Clock Input:

• Format
  0.2 Vp-p to 3.3 Vp-p
• Input impedance
  50 Ω
• Frequency range
  0 - 25 MHz (fed to the FPGA)

External Trigger Input

• Format
  LVTTL/LVCMOS (TTL tolerant)
• Frequency range
  0 – 526 kHz

RS485 Transceivers

• Format
  RS485
• Data Rate
  Up to 20 Mbps
• Number of Channels
  2 (half duplex)

LVTTL I/O Transceivers

• Format
  LVTTL/LVCMOS (TTL tolerant)
• Number of Channels
  8 (half duplex)

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