4DSP Support Forum
Products => Board Support Package (Installation, Licensing, ...) => Topic started by: stevebo on May 23, 2013, 10:20 AM
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I try to get to this link below
This topic has been moved to Teradyne (http://www.4dsp.com/forum/index.php/board,370.0.html).
http://www.4dsp.com/forum/index.php?topic=2055.0 (http://www.4dsp.com/forum/index.php/topic,2055.0.html)
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Is this issue resolved yet?
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Yes
However now when I create the vc707_fmc176.prj file it creates the needed files, but the top level VHDL has some compile errors and I am unable to complete the bitstreem generation.
The file vc707_fmc176.vhd that has been generated is incorrect.
Steve
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Steve,
I am not sure what you mean by .prj. StellarIP is creating a .xise file which you should open in Xilinx ISE
Best Regards,
Arnaud