Thank you very much for your quick reply,
I've checked this link , it lead me to the reference designs (RTL reference design and getting started reference design and System Generator reference design) - however details of how the communication between the FMC150 and FPGA is not provided.
if I am not using System Generator, and just using Xilinx ISE ,
should I write the interface and the communication between the Virtex-6 FPGA and the FMC150, or is it -somehow- provided ?
Thanks again for your help,
Ahmed.