Topic: ZC702 + 2 FMC30RF  (Read 3375 times)

fjoao012 March 03, 2015, 09:51 AM

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Hello,
I'm currently trying to build a design in the ZC702, where it is connected to 2 (two) FMC30RF, one in each FMC LPC port, but now I'm having some issues concerning the design:
I started with your StellarIP design, and edited it to have the two boards; after that, I opened ISE, and after some tweaks to the VHDL to implement all like I wanted, the ISE design tells me that the design is unfeasible due to the overmapping of RAMB36E1.
Basically, I just duplicated the FMC30RF board in this design, and the quantity of RAMB36E1 used in the original project doubled, turning the design impossible. With this, I assumed that all the RAMB36E1 is being used just in the FMC30RF..
In the documents you provided, you say that is possible to make a MIMO architecture, and I wanted to ask you some things:

1) What is your recommendation regarding such a design? Should I use a multiplexer to receive information from the two boards or should I use just one axi bus? Or Should I just follow a completely different approach to this problem?
2) Is there any way I can change the utilization of all the RAMB36E1 provided in your design? For example, turning the RAMB36E1 to RAMB18E1 or any other thing?
3) Do you have any documentation/tutorials/examples regarding this "one ZC702-to-two FMC30RF" design I'm trying to build?

Thank you,
Joao

arnaudNL March 06, 2015, 09:19 AM (#1)

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Dear Joao,


1) I think you one a data merger and two FMC30RF stars connected to it. This would provide you with a stream of data coming from both stars. Unfortunately I don't have such a star available out of the shelve.
2) I believe there are input/output FIFOs on the tx/rx wormhole connecting to sip_fmc30rf as well as waveform memory. It might be that the zynq chip don't have enough resources in order to double that up. Try to divide by two the resource of one FMC30RF star and then it should work.
3) No, the only thing we have is the reference for one FMC30RF. Using two FMC30RF together is more about architectural difficulties so it is not easy to document. But anyway, we are here to provide you with pointers when you need.


Best Regards,
Arnaud


 

arnaudNL March 09, 2015, 05:55 AM (#2)

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Dear Joao,


Do you still need this topic open? do you need extra information about this specific issue before I close this topic?


Best Regards,
Arnaud

fjoao012 March 09, 2015, 08:02 AM (#3)

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Hey Arnaud,
I'm interested in the 2) solution you provided, I had already thought about it but I didn't acknowledge how to make that yet. I'm trying to use Core Generator (by Xilinx) on the sip_zc702 module you provided from StellarIP. Is this the way, or do you recommend to do it differently?

Thanks,
Joao

arnaudNL March 09, 2015, 11:13 AM (#4)

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Dear Joao,


Yes, correct. There are many cores in the star_lib\sip_fmc30rf\vhdl\z7\xilinx folder containing FIFOs. There are ise project as well as xcos for these.


Best Regards,
Arnaud

fjoao012 March 09, 2015, 11:18 AM (#5)

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Thank you very much.
I'll go that way then.


Joao

fjoao012 March 09, 2015, 12:14 PM (#6)

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Arnaud,
I have another question, related with the software (FMC30RFAPP.exe with Visual Studio project) you provided: in this case (2 FMC daughter cards), where can I get the starting address of each one of them? It seems that, in the provided software for just one board, that the value is fixed so is there any place where I can find this info? (in the created files of the project, in any pdf provided by you..)


Thank you,
Joao

arnaudNL March 10, 2015, 12:17 PM (#7)

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Dear Joao,


StellarIP is creating this addresses while generating the firmware project. In the output generated by StellarIP you can either find a vhdl file, cid_package.vhd as well as a C header file created by StellarIP it should be called as per your constellation name followed by a .h


In the FMC30RF software is a layer/module called CID, ie cid.cpp. This module is parsing the information retrieved from the sip_cid star in the firmware. Additionally, the same module contains a set of functions to obtain such information dynamically. cid_getstaroffset() retrieves the base address of a given star, looked-up by star id numbers. This function can fill up an array of base addresses if there are more than one star of the same type.


The advantages of doing that is to keep the software generic. It could be that a day a firmware engineer is adding a star in the design which can in some cases change some of the base addresses and then you better have the software able to actually find the addresses during runtime.


sip_cid (in fw), CID (in sw) are linked to each other and this is one of the StellarIP backbones.


As a last note, in the software source code is a .chm document, a doxygen documentation of the software, including CID and others.


I hope that helps!


Best Regards,
Arnaud

arnaudNL March 16, 2015, 05:50 AM (#8)

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Dear Joao,


Please let me know if you need more information before I close this topic.


Best Regards,
Arnaud


PS: We are slowly phasing out the support forum, you can keep claiming support from support.4dsp.com.



fjoao012 March 16, 2015, 06:11 AM (#9)

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Dear Arnaud,
go ahead, you can close this topic!
Thanks for your help.

Joao

arnaudNL March 17, 2015, 07:49 AM (#10)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.