Hello,
Regarding your questions:
1. The external reference goes through some AC-coupling caps and through a balun, I don't expect issues with passing the 33% duty cycle reference, however I wouldn't be surprised if this affects the phase noise performance of the PLL.
2. No we don't have experience with an asymmetric reference clock.
For external reference usage you will have to disable to on-board reference osc. The enable of the on-board oscillator is pulled-up by default and therefore enabled. This enable must be pulled to ground. This enable pin is not directly available on the FMC connector of the FMC104. It is connected to the STATUS output pin of the AD9510.
You will have to program register 0x08 bit [5:2] with value 0000 to pull this signal to ground. Please refer to the AD9510 datasheet and the reference app. It should be enough to change line 210 of FMC10x_clocktree.cpp:
sipif_writesipreg(bar+0x08, 0x6F); Sleep(10); //charge-pump normal, status Hi-Z = internal ref
to:
sipif_writesipreg(bar+0x08, 0x43); Sleep(10); //charge-pump normal, status '0' = external ref
Best regards,
Ingmar van Klink
4DSP