Topic: Configuring AD9517-3 on FMC112  (Read 12172 times)

mhada February 06, 2015, 09:04 AM

  • Member
  • *
  • Posts: 23
Hi,

We have been trying to understand the configuration of AD9517-3 on FMC-112 with ML605 board having Ethernet interface. In that the project created has a VHDL instance ad9517_init_mem which has memory initialization file 'ad9517_init_mem.mif' which consists of the code for clock manager initialization.

This file has following sequence of data :-

00000001000001111100
00000001000100001010
00000001001000000000
00000001001100000000
00000001010000011001
00000001010100000000
00000001011000000100
00000001011110110100
00000001100000000000
00000001100100000000
00000001101000000000
00000001101100000000
00000001110010000111
00000001110100000000
00001111000011000000
00001111000100000011
00001111010011000000
00001111010100000011
00010100000000000001
00010100000100000001
00010100001000000000
00010100001100000001
00011001000000000000
00011001000110000000
00011001001000000000
00011001011000000000
00011001011110000000
00011001100000000000
00011001100100000000
00011001101000000000
00011001101100000000
00011001110000100000
00011001110100000000
00011001111000000000
00011001111100000000
00011010000000000000
00011010000100100000
00011010001000000000
00011110000000000000
00011110000100000010
00100011000000000000
00100011001000000001

for AD9517 initialization. Now when studying this code, we find that for AD9517-3, 100MHz on board reference signal is chosen with divider register of AD9517 -> R = 10. Again values of registers A and B of AD9517-3 is 0 and 25 respectively with prescalar P = 8. The internal VCO running @ 2000MHz is divided by '2' and the LVPECL dividers are bypassed.

As per computation the clock signals coming from LVPECL ports of AD9517-3 should be 125MHz whereas as per the memory file ahown above it comes to 2000MHz / 2 = 1000MHz. Are there some on board hardware clock dividers after AD9517-3 (I can't imagine that)

I request you to please explain the disparity to us and where we are not able to understand the code.

On the hardware things seem to run fine.

Many Regards.
Thanks and Regards.

Mohit Hada

arnaudNL February 06, 2015, 09:33 AM (#1)

  • 4DSP Staff (EU)
  • Administrator
  • Member
  • *****
  • Posts: 7110
Dear Sir,


The ad9517_init is not sufficient; The reference software is in fact configuring everything in a state it can be used. Check FMC116_clocktree_init() in fmc116_clocktree.cpp this is the software file configuring the AD9517.


Modifying sipif.cpp to add a line each time a write to firmware register is done will provide you with the required default values.


I hope that helps,
Arnaud

mhada February 07, 2015, 02:54 AM (#2)

  • Member
  • *
  • Posts: 23
Dear Arnaud,

I am further confused with your mail. Firstly we are having FMC112 hardware. Secondly the reference stellar project given by you for FMC112 do not have the files mentioned by you and nor their equivalent.

According to me there is a file fmc112_if() which has sub file fmc112_ad9517_ctrl() which configures FMC112 using SPI interface. Now kindly clear my air of confusion.

Thanks and Regards
Thanks and Regards.

Mohit Hada

arnaudNL February 09, 2015, 05:30 AM (#3)

  • 4DSP Staff (EU)
  • Administrator
  • Member
  • *****
  • Posts: 7110
Dear Sir,


The reference design is a firmware (stellarIP) and a software (visual studio). The files I was referring, ie sipif.cpp. to are in the software package.


What I also said is that the firmware as a standalone entity is not going to operate. The software is configuring all the integrated circuit on the board through the firmware during run time.


Look at the SD128 document, the FMC112 star document, chapter 5, the AD9517 is mapped between address 0x300 and 0x532 and the software configure the chip in the source file fmc116_clocktree.cpp. The communication goes through a mac_engine or a host interface star.


Note that the software is generic, it should have been named FMC11x initially because it is same for both FMC112 and FMC116.


I hope that helps!


Best Regards,
Arnaud











mhada February 09, 2015, 08:24 AM (#4)

  • Member
  • *
  • Posts: 23
Hi arnaud,

Thanks for the reply as I am able to understand what you are saying. But then kindly clarify that :-

you mean to say, AD9517 first gets configured through STELLAR firmware whatever has been hard-coded in the FPGA and then does it get re-initialzed or re-configured through mac commands from the PC side.

Clarification on this will solve my doubts and then I can check further on this.

Thanks and Regards.
Thanks and Regards.

Mohit Hada

arnaudNL February 09, 2015, 08:33 AM (#5)

  • 4DSP Staff (EU)
  • Administrator
  • Member
  • *****
  • Posts: 7110
Dear Sir,


That's correct!


Best Regards,

Arnaud



mhada February 09, 2015, 09:01 AM (#6)

  • Member
  • *
  • Posts: 23
Dear Arnaud,

Ok. Thanks for the reply, I will check and come back on this.

Thanks and Regards.
Thanks and Regards.

Mohit Hada

arnaudNL February 10, 2015, 10:41 AM (#7)

  • 4DSP Staff (EU)
  • Administrator
  • Member
  • *****
  • Posts: 7110
Dear Sir,


Was that helpful, are you able to move forward?




Best Regards,
Arnaud

mhada February 11, 2015, 03:14 AM (#8)

  • Member
  • *
  • Posts: 23
Dear Arnaud,

We had some urgent client visits from which we are free now and we will be looking into this week.

Thanks for your reply. In case you want to lock it, you may proceed. We may start a new thread in case required.

Thanks.
Thanks and Regards.

Mohit Hada

ebarhorst February 12, 2015, 09:05 AM (#9)

  • 4DSP Staff (EU)
  • Administrator
  • Member
  • *****
  • Posts: 1222
This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.