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fmc161 vivado project

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leongnrl:
I believe you use the newest version StellarIP to generate right? When you generate the ISE project from StellarIP, what was the ISE version number too?

lmunoz:
I use StellarIP 1.3.1.0. I didn't use ISE. In StellarIP go to Design->Design Details under Flow Support I selected Vivado Supported and un-select ISE.  For that to work you have to convert the UCF files to XDC for each Star that has external signals, I did that and sent you the combined XDC file already.

leongnrl:
I got the following error when I have setting-> Firmware-> Xilinx ISE disable, Xilinx Vivado Enabled

Vivado flow is enabled in the StellarIP settings but this firmware does not support it. StellarIP will not create a Vivado project!

Did you generate the vivado project directly from StellarIP or generate an ISE program from Stellar IP first then import to vivado?

lmunoz:
I generated Vivado project directly from StellarIP, I've never seen that error. I'll ask software engineer about that.

StellarIP->Settings do you have the path for the Vivado bin directory?
Design->Design Details do you have Vivado Support?


Were you able to download the zip file I linked to and run the bit file?

leongnrl:
I was able to get ur project to work.

I figured out that I didn't enable vivado under Design -> Design Details, instead, I enabled vivado under Default Design Details only.

One interesting thing is, I still can't get my project to work by generating vivado from StellarIP with no XDC change, and then adding your combined xdc later.

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