Topic: FMC168 External Trigger  (Read 5862 times)

roengrut December 15, 2014, 01:40 AM

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Dear 4DSP,

I currently have an FMC168 and would like to implement external trigger capability of the FMC board. After taking a look into the software part (main.cpp) of this board and also into the VHDL part (fmc168_ctrl.vhd) I found the software trigger function, called FMC16x_ctrl_sw_trigger. In the fmc168_ctrl.vhd file line 346 there is the trigger source selection part of the code. There are 3 conditions for trigger selection, sw_trigger, trigger_sel_reg = EXT_TRIGGER_RISE, and  trigger_sel_reg = EXT_TRIGGER_FALL. I would like to apply external trigger (will be supplied through External Trigger pin) and I think that the latter 2 conditions of trigger selection part would be used. I really do not know how to implement or call which function in the software part (in the main.cpp file) in order to use with the External Trigger. I could not find any hardware-related function (in C). Please correct me or suggest me if I am wrong or miss anything related to this.

Could you please suggest me how to do this ? I would be really appreciated. Thank you very much for your time and I look forward to receiving your suggestions soon.

Regards,
Roengrut

arnaudNL December 16, 2014, 12:06 PM (#1)

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Dear Roengrut,


In a RTL point of view you have an OR between software and external trigger. It is actually pretty straightforward. FMC16x_ctrl_sw_trigger() actually writes to FMC168.CTRL in the RTL, it writes 4 to the first register of the control module in the FMC168 star.


If you look at the star documentation (SD192) chapter 6, you will see that FMC168_CTRL_COMMAND definition has bit2 called 'TRIG' and this is exactly what writing 4 at BAR CTRL does in FMC16x_ctrl_sw_trigger.


What you want to do is write a FMC16x_ctrl_set_trigger_source() and write there the value you want in FMC168_CTRL_CONTROL bits 8 and 9. Looking at chapter 5 you see that FMC168_CTRL_CONTROL is located at the address where FMC168 star is located + 1.


Just to make sure, I would anyway remove the software trigger call from the software and not expect that to be really disabled by ETC, I believe there is a OR operation between the two trigger source.


I hope that helps!


Best Regards,
Arnaud



roengrut December 18, 2014, 04:10 AM (#2)

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Dear Arnaud,

Thank you for your recommendation very much. My colleague who develops the application just tried to apply the function  FMC16x_ctrl_set_trigger_source()  to set the ETC bits (bit 8 and/or bit 9) of the FMC168_CTRL_CONTROL. He checked that the software does what we want and hoped that it would enable the hardware trigger . As I and he double-checked with the VHDL code in fmc168_ctrl.vhd lines 346 - 355, we hoped that the conditions 2 or 3 will be true ( by knowing that ext_trigger_re = '1' or ext_trigger_fe = '1'). After trying, we found that this does not work.  He did try with disabling (removing) the software trigger call from the software, and he confirmed that ETC bits changed to what he wanted but still hardware trigger does not work. We think that there is no OR operation between two trigger sources. You can see the pictures I attached here.

Up to this point we still do not know what to do next. Is there anything we should do with the FMC168_CTRL_COMMAND's bit "TRIG" in relation to the FMC16x_ctrl_set_trigger_source() function in the software ? We now just know that the hardware trigger does not do anything witht the TRIG bit of the register FMC168_CTRL_COMMAND . Is there anything else that we should do to get it to work?

iklink December 22, 2014, 08:34 AM (#3)

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Dear Roengrut,


In your main function C file, I see that you arm the trigger before configuring the external trigger as a trigger source. I recommend you to first enable the external trigger and then arm the trigger block.
Secondly; to verify your external trigger is present on the input of the FPGA, you could perform a quick test by providing a 10MHz trigger. You should see a trigger frequency of 10MHz in the Log of the reference application (in the frequency measurement section).


Best regards,
Ingmar van Klink
4DSP

lmunoz December 22, 2014, 05:57 PM (#4)

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Hi,

I have verified this works. You first should verify you are applying the correct type of signal to the external trigger as Ingmar recommended you should see the output like this:

 --- Measuring on-board frequencies ---
Stellar IP Clock : 125.00 MHz
ADC PHY0 Clock   : 250.00 MHz (Fvco = 1250.00)
ADC PHY1 Clock   : 250.00 MHz (Fvco = 1250.00)
External Trigger :  10.01 MHz
Clock to FPGA    : 250.00 MHz
 

 Next I modified the function FMC16x_ctrl_enable_channel to write 0x301. Instead of the usual 0x1. That will enable both rising and falling edge external trigger.
  Then I comment out the line that does the software trigger ….
  // send a software trigger to the ADC block
// if(FMC16x_ctrl_sw_trigger(AddrSipFMC16xCtrl)!=FMC16x_CTRL_ERR_OK) {

 Then i was able to read data that was a result of an external trigger.

Regards,
Luis

roengrut December 23, 2014, 10:26 AM (#5)

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Hello,

Reply to Ingmar : Thank you very much for recommending enabling the external trigger before arming it. My colleague just tried doing it today.

Reply to Luis : Thanks very much for giving me the hint and showing a result from your test.

Unfortunately, we still get the same outcome as before, receiving the timeout. We also tried to apply the external trigger with arbitrary frequency; e.g. 10 MHz trigger as Luis did. The result is that the output shows "External Trigger : 0.02 MHz" for any frequency we apply, and the same timeout occurs. Is there anything we need to try? Is it related to the BSP of our FMC168 board we are using?

Look forward to receiving your suggestion again. Thank you very much and Merry Christmas to all of you.

Roengrut

lmunoz December 23, 2014, 12:36 PM (#6)

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Most likely you are applying a signal that is too weak or the wrong IOSTANDARD. What amplitude and what type of signal are you using? Try increasing the voltage.
  • « Last Edit: December 23, 2014, 12:45 PM by lmunoz »

roengrut December 25, 2014, 11:41 AM (#7)

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Hi Luis,

We apply a single-ended trigger signal through the ssmc connector of the FMC board (Trigger channel). The amplitude is approximately 4 V. The IOSTANDARD is the regular lvds since the signal is converted to it on board and we do not modified the VHDL part of the hardware design. If there is anything we should do, please suggest us again. Thank you very much.

Roengrut

iklink December 29, 2014, 11:21 AM (#8)

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Dear Roengrut,


4V amplitude could potentially damage the device because it is LVTTL compatible and has got a maximum input voltage of +3.3V. Are you using a DC-coupled signal source? The trigger signal must have a logic low level of 0V < signal < 0.5V and a high level of 1.25 < signal < 3.3V. Also, the trigger input has got a weak pull-down to ground, so it's not possible to use an AC-coupled signal.


I double checked the test report of your FMC and at the time of manufacturing testing the trigger seemed to work. Which carrier board are you using? One of the Xilinx development boards? Would it be worthwhile to double check your synthesis and implementation output to see that the trigger inputs of the FPGA properly connect to the correct logic?


Best regards,
Ingmar

ebarhorst January 07, 2015, 09:58 AM (#9)

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Dear Roengrut,




would you have an update for us on this topic?




Best regards,
Erik

roengrut January 08, 2015, 05:21 AM (#10)

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Dear Ingmar and Erik,

Thaks very much for your advice and sorry for keeping you wait for a while. My team just checked on what you suggested. We reduce the amplitude level to 2 Volts, but with the frequency of 21 kHz trigger input. You can see from the diagram.pdf file I attach here. The outcome is still the same (it still does not work). In the test we did not change any steps in the software (i.e., configurerouter, ctrl_enable_channel, ctrl_set_trigger_source, ctrl_arm, and sipif_readdata, respectively....from the pdf file shown here). By the way, for your information, my colleague use the Xilinx ML605 (Virtex-6) board for the carrier board.

I also have a question on IOSTANDARD of the hardware trigger input. We still use the same IOSTANDARD for the trigger input given in the vhdl files (project) generated by stellar IP. I attach 2 jpeg-files here which are captured from fmc168 datasheet. So, the FMC168 board already converts the single-ended trigger input to the LVDS input supplied to the FMC connector on the ML605, right ?

We also have a couple more questions.
1) Do we need any interrupt service routine before reading the data in the software part?
2) Does Burst Size play any important role related to External Trigger? In the test, my colleague used a Burst Size = 2x1024 (for the hardware trigger). He also tried with the software trigger (by disabling the hardware trigger) and reduced the burst size. He found that if the Burst Size = 1 or 2, the communication with the device cannot be achieved. If the Burst Size = 4 or more (still using the software trigger), there is no problem.

I hope this would help you see the picture we have been testing. Thank you very much for your time spent with us. We still look forward to receiving your suggestions again.

Best Regards,

Roengrut

ebarhorst January 08, 2015, 12:57 PM (#11)

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Dear Roengrut,


Ingmar will look at your post coming Monday as he is on vacation right now.


Best regards,
Erik

roengrut January 09, 2015, 03:43 AM (#12)

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Dear Erik,

Thanks very much for the update. We will wait for your suggestions next week then.

Best Regards,

Roengrut

iklink January 12, 2015, 12:57 PM (#13)

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Dear Roengrut,


I checked the pinout of the ML605 again and I noticed that HPC_CLK1_M2C_P connects to AP20 of the ML605 and HPC_CLK1_M2C_N connects to AP21. Which revision of ML605 are you using? Could you try to connect the trigger signals to AP20 and AP21?


Regarding your other questions:
1) If you are uning the PCIe interface, we use interrupts for the DMA operation. For Ethernet we are waiting on a queue to have the right amount of data (in a lower level there is an ISR involved).
2) The burst size doesn't behave different between the ext or int trigger, however I your first burst is not completed when receiving the second ext trigger, this trigger will be ignored.


Best regards,
Ingmar





arnaudNL January 14, 2015, 11:24 AM (#14)

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Dear Roengrut,


I assume the answer was satisfactory, can I proceed with closing this topic?


Best Regards,
Arnaud