Dear Sir,
What you describe is surely digital domain error; a ramp test is not the ultimate test, a noisy input around 0 is much more stressful than a ramp so you should not conclude that after your ramp test everything is right.
In our one channel @5Gsps firmware we have different buffering and different PHY interface. We have a calibration package (firmware and software) working out of the box on both ML605 and VC707, the cost is 2400 euros, maybe this is something to consider on your side.
To stick to your question, no we have not seen that but we really made sure the digital domain is fine by having a bit alignment machine (which is not using the ADC ramp test, I think it uses this pseudo random mode ). Then we work on the analog compensation.
I am attaching the user manual of this calibration package in the case you are interested by cutting out some headache.
Best Regards,
Arnaud
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