Topic: Interfacing FMC150 and ML605.  (Read 9402 times)

fmcuser August 27, 2014, 05:13 AM

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I am trying to interfacing FMC150's ADC and ML605.
Can you tell me where I can get the reference vhd files to realize this?
Thank you!

arnaudNL August 27, 2014, 05:24 AM (#1)

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Dear Sir,


I believe you purchased the board through Avnet. Avnet have their own reference design but you can also download the reference design from http://www.4dsp.com/fmc/bsp


Make sure to use a valid email so you can the license file required for the BSP installation.


Let me know if you have got all the information required, then I will close this topic. Feel free to create other topics later on for other issues.


Best Regards,
Arnaud

arnaudNL August 28, 2014, 09:50 AM (#2)

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Dear Sir,


Was the information sufficient? Can I go ahead and close this topic, feel free to open any other topics anytime you need so.


Thanks,
Arnaud

fmcuser August 28, 2014, 10:04 AM (#3)

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I installed 4FM FMC Analyzer and so on.
After I opened 4FM FMC Analyzer, connected the host PC with ML605 (FMC150 is attached via LPC) with an Ethernet cable. I chose Atheros L1C PCI-E Ethernet Controller in the "List of Devices to Connect" and clicked "Open Device". A window looks like command prompt appeared.
But I could not make connection.
An error message says "Unable to connect to FPGA device. Perhaps an incorrect device id was used or incorrect firmware was loaded".

arnaudNL August 28, 2014, 10:33 AM (#4)

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Dear Sir,


Implicitly have you loaded the right bit file in your FPGA (ml605_fmc150.bit)? Are you aware that you cannot power cycle the ML605 or you will lose your FPGA configuration.


Also please check http://www.4dsp.com/forum/index.php?action=faq, you will need to disable firewall and ask your company IT to make sure there is no external firewall, you need to make sure to use a short Ethernet cable as well as use a direct connection between the host computer and you ML605.


Also please try to run FMC15xApp and see if it fails, this is a command line application which could tell a bit more than what the FMC analyzer does.


I hope that helps,
Arnaud

fmcuser August 28, 2014, 10:38 AM (#5)

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Thank you for your quick reply and advice.
I downloaded my bit file successfully to the FPGA via JTAG.
The host PC's IP address is set to be 192.168.1.1, subnet mask 255.255.255.0, and the default gateway 192.168.1.10.
Are these correct?

arnaudNL August 29, 2014, 03:30 AM (#6)

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Only Zynq firmware are supporting TCP/IP, you should find your NDIS index and use ETHAPI layer.

fmcuser August 29, 2014, 03:54 AM (#7)

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SO, what physical connection should I use? PCI express?

arnaudNL August 29, 2014, 04:35 AM (#8)

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Hello Again...


Ethernet but not TCP/IP, I read again my post and I don't see any notion about PCIe.


I think you should start with reading relevant section from the Getting Started Guide (C:\Program Files (x86)\4dsp\4FM Core Development Kit\Documentation\4FM_Get_Started_Guide.pdf). Look at chapter 11, 11.1.


If that does not work, please check the various points in the faq page (http://www.4dsp.com/forum/index.php?action=faq)


I really hope that helps..
Arnaud





arnaudNL September 03, 2014, 04:41 AM (#9)

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Dear Sir,


Where are you at, have you got the reference design to operate?


Best Regards,
Arnaud

fmcuser September 03, 2014, 05:36 AM (#10)

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Hi, thanks for your info.
I wrote vhd files to get the ADC data sent from FMC150.
The ADC data are differential and DDR.
So, I used IBUFDS (http://www.cs.indiana.edu/hmg/le/project-home/xilinx/ise_13.2/ISE_DS/ISE/doc/usenglish/isehelp/7series/libs_le_ibufds.htm) to change the scheme into single-ended.
After this, I used IDDR (http://www.cs.indiana.edu/hmg/le/project-home/xilinx/ise_13.2/ISE_DS/ISE/doc/usenglish/isehelp/7series/libs_le_iddr.htm) to change it the be SDR.
After I obtained the ADC data (single-ended and SDR), I sent them to another vhd for signal processing.
And I have an error here, which is ...
ERROR:Pack:1107 - Pack was unable to combine the symbols listed below into a single IOB component because the site type selected is not compatible.

There are no more information about this error and I have been confused.
The vhd file for signal processing has no problem. Apparently the error occurred with the ADC data (single-ended SDR).
It will be helpful if you can give me any advice.
Thanks.

arnaudNL September 03, 2014, 06:52 AM (#11)

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Dear Sir,


As far as ISE errors are concerned, there is nothing we can do. You can try to open a webcase with Xilinx and ask the questions to them or use google to do that.


Another option is to purchase an engineering support contract where one of our engineer could go through the firmware design basics with you, let me know if this is a path you are interested with, this should be discussed with sales and I can arrange that they get in touch with you.


Thanks,
Arnaud

arnaudNL September 04, 2014, 08:21 AM (#12)

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Dear Sir,


Can I go ahead or close the topic or have you other questions related to the 4DSP material?


Thanks,
Arnaud

arnaudNL September 10, 2014, 05:06 AM (#13)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.