Topic: New Inquiry into Modified FMC204 Design  (Read 10843 times)

jbaker August 22, 2014, 10:48 PM

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MaxLinear has received two FMC204 boards today (22-Aug-2014).  These boards have been modified based on  the attached 4DSP application note (TN101).  These boards are currently not operational for MaxLinear's setup.  The 4DSP Card's PLL does not show lock.  Below are key observations from use of these boards.  Please respond with comments or questions after reviewing this message and attachments.


Regards,
Joel


FMC204 Board Behavior Questions/Concerns:
  • [size=78%] MaxLinear has used commands shown in attachment "vco.txt" to control 4DSP card setup.  Modified 4DSP cards do not function properly using this initiation script.  This is surprising as previous modified 4DSP card functions well.[/size]
  • [/size][size=78%]MaxLinear has recognized the need for a +3.3V charge pump supply to the AD5917 clock chip.  MaxLinear has reviewed and found need for +3.3V supply to the charge pump supply.  Modified FMC204 boards do not show a green wire or other connection to run the charge pummp.  In 4DSP's research, was the +3.3V supply needed?[/size]
  • [/size][size=78%]What PLL related tests were performed with these boards before leaving the 4DSP test house?  Standard 4DSP software uses the DLL settings.  MaxLinear is interested to know what modifications were verified in 4DSP tests and if they can be repeated at MaxLinear.[/size]

peter August 25, 2014, 11:23 AM (#1)

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Joel,


4DSP did verify the functionality of the boards with the reference design you can download. The required changes we made are highlighted in the Technical Note. Can you follow this approach; take the latest reference design and make the changes? We are looking into making the modified reference design available. This normally takes a longer amount of time because it needs to be released in our BSP.


The AD9517 does indeed need the charge pump voltage. On the board this is sources from the same power supply as the VCO. There reference design is enabling that voltage. There is no need to modify the board in this regard. 4DSP never placed a green wire and it should not be there.


Best Regards,
Peter





peter August 25, 2014, 03:04 PM (#2)

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Joel,


I have confirmed that a reference design supporting the C126 modification is already present in the latest BSP. Please download from www.4dsp.com/4FM/BSP

In case of your own application, please make sure CLKSRC in CPLD register 0 (see user manual) is set to '011' or '110'. If you program the external clock option '000' the VCO and VCP is powered down.


In your application you want to use a 125MHz external reference. In this case program CLKSRC to "Internal clock, External Reference", which is '011'.

Peter
  • « Last Edit: August 25, 2014, 03:21 PM by peter »

peter August 26, 2014, 10:57 AM (#3)

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Joel,


Could you provide me with some feedback if the support I provide helps you in the right direction?
Please let me know if there is anything else I can help with.


Best Regards,
Peter

peter August 27, 2014, 11:36 PM (#4)

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Joel,


If you don't mind I'll close this topic. I assume my suggestions did solve the issue.


Peter

arnaudNL August 29, 2014, 04:36 AM (#5)

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Joel,


We will close the topic on Monday if we don't get any more news from your side.


Best Regards,
Arnaud

peter September 02, 2014, 09:42 AM (#6)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.