I have tried many different values to config CDCE72010's register, but i failed. I just want an external clock(119MHz) to be the ads62p49's sampling clock. After i config the CDCE72010, I do get a pair of 119MHz signal in out2_p and out2_n( which are to feed the ads[size=78%]62p49's sampling clock). But i don't think they are LVPECL signal , because out2_p and out2_n have the same wave, but their amplitude are different, out2_n's amplitude is 4 times out2_p's. [/size]
I found in the forum someone have the same problem(about how to config CDCE72010), and 4DSP's engineer's advise is to refer to the 'reference software application' . however after i download the 1GB-size 4FM.SDK file and setup on my computer, I am more confused about how to operator this application( i cannot find the CDCE72010's register setting)
Anyway, all i want to know are some points on configing the CDCE72010.( I have read the datasheet many times, some points are really not explained clearly)
1. when i use external clock, I use the CDCE72010's AUX as the feed of output divider. Should the AUX be congfiged as LVPECL or LVDS ?
2. How to config register8's 8.2 to 8.5 ( i think these bits are very importent,and their value is decided by the chip's [/size][size=78%][/size][size=78%][/size][size=78%] the FMC150 data manul oughts to tell us how to config them) [/size]
3. Should the output9 be disabled?
4.Do the PRI_REF and SEC_REF's setting not have any effect in case i use external clock.
Help me !
cecilia