Sending a digital signal through the FMC151

Hi,
I have an ML605 fpga board and have the FMC151 attached on the lpc fmc.


According to the spec, to send a signal through the DAC, I need to send an LVDS clock signal, LVDS data, and LVDS frame signal, as well as the control. I know how to control clock, frame, and data transmission easily, and understand that. But I'm not sure which parts of the control I need to manage to enable the data transfer.


According to the spec of the DAC3283, the control takes in an SD_enable and SClk and a txenable. How can I configure the control to send my signal through? I'm a little lost here and the VHDL getting started reference design was a little too all encompassing for my needs. I just need to configure the control to allow me to send my 8 bit differential pair signal through.


Thanks
-Erik

Dear Erik,


The reference software/firmware delivered as source code is able to play/acquire data. Additionally you can check the SDxxx document available in the firmware source code.


Have you already checked all these element?


Best Regards,
Arnaud

Are you referring to a location in C:\Program Files (x86)\4dsp\Common\Firmware?  Or are you talking about the RTL reference design? Where is the SDxxx document?


--Edit: Just looked, I had already looked at this before, however these didn't help much with actually configuring the card in ISE, for ADC and DAC methods. Is this card primarily supposed to be used in the StellarIP software, because that's what it seems like looking at the SD224.pdf file.

I just want to be able to read in a function through the adc, perform some function on it(maybe scaling by 1/2 would be good for now) and then send it back through the DAC and be able to read it on an oscilloscope. Is the information I need to be able to do this in the firmware sourcecode?

Erik,


The firmware is wrapped as a StellarIP firmware; as soon you generate your design you get a Xilinx ISE project. Then you have a few RTL module in the firmware which are all described by a SD document. Actually the entry point is the CD document.


The software (C:\Program Files (x86)\4dsp\4FM Core Development Kit\Plug-Ins or C:\Program Files (x86)\4dsp\FMC Board Support Package\Refs\Software) writes 32 bit words to all the chips through the firmware and brings up the complete FMC151 up and running.


The SD document for FMC150/FMC151 describes the address mapping.


Running the software application setups the FMC15x in a way it plays samples on the DAC and acquire samples from the ADC. If you attach a loopback cable you will acquire what you are playing for both internal and external clock mode.


Some of our customers are adding a chipscope in the firmware and simulate to gain understanding on the design.


We also have dedicated training available for our customers, please contact sales@4dsp.com if you want to discuss that further.


I hope that helps!


Best Regards,
Arnaud

So according to the firmware VHDL,

Code: [Select]

    -- If DDC and DUC is bypassed connect the ADC outputs to the DAC inputs
    if (ddc_duc_bypass = '1') then
      dac_din_i <= adc_dout_i;
      dac_din_q <= adc_dout_q;
I set the dipswitch corresponding to the ddc_duc_bypass to 1, sent in a sine wave function through a function generator, and displayed the corresponding DAC output on an oscilloscope, and it doesn't look like the sine wave I was generating in the slightest. It's periodic, but not at all what I was generating.

I too, have also put in a lot of ILA cores and modified the ICON core to accomodate for this, and I've set the triggers of these ILAs to various adc outputs, and I cannot find the sine wave I was generating at all.

I would like to add that I sent the same sine wave through again, and used the fmc15xapp program to log the 16384 samples. Upon putting them in a data table, they also do not look like the sine wave. They again seem to be periodic with it, however, they are not smooth, regardless of frequency and voltage. The dac seems to have no problem however the adc is giving me weird results.


I've attached the graph produced by the data retrieved by the fmc15xapp

Hi Erik,

Which firmware are you using, what vhdl source file are you referring too? Does the 417_ml605_fmc151 reference firmware work using a loopback cable from the DAC to ADC? This should be a base example for how the DAC and ADC work. I don't know what you mean by sent a sine wave through a function generator and displayed the corresponding DAC output on an oscilloscope. We can't really help you debugging custom firmware, we can answer things that are not clear and help you get the reference design working (capturing data with the ADC and playing a waveform on the DAC).

Regards,
Luis

Hi,

I am using the provided firmware. This is not custom firmware at all.

When I am sending in a sine wave through the ADC, and outputting that same sine wave through the DAC, I am hooking that output up to an oscilloscope. The result is not like the input, with only the period being the same. I know the DAC is working because when I set the ddc_duc_bypass(in the provided firmware) to 0 via the dipswitches, the generated signal displays just fine. However, when using the signal provided by the ADC(from the sine wave), the output is atrocious.  The attached visual displays very clearly what's supposed to happen. If the mux(controlled my ddc_duc_bypass) is set to 1, the data sent through the oserdes block is the output from the ADC block.

But even with this example aside, I have further suspicions toward the ADC's output by result of the provided FMC15xAPP results. As I'm sure you know, this program reads in the raw data from the ADC and outputs the values in a text file. Upon sending in a sine wave again, and running that program and generating a plot using the collected data points, the result is what you see attached in my previous post.

Dear Erik,


You will not be able to use FMC151 on a FMC150 design, that's for sure. The avnet design you are referring to was never ported to FMC151.


Can you please use 417_ml605_fmc151.bit in conjunction with the latest FMC15xApp, please confirm this is the bit file you are using, not anything else.


My point here is that you seem to have timing errors on the transfer between FMC151 and the FPGA in the databus. The Avnet reference design is supported by Avnet and our reference design is supported by 4DSP so we need to focus on the 4DSP reference design.


Can you please confirm you are using the precompiled (unmodifed 417_ml605_fmc151.bit) as well as the precompiled FMC15xApp software? Can you please send me the text file created by the application?


Best Regards,
Arnaud

Thanks for replying so quickly.

I just tried it again, the .bit file I'm using is located at
C:\Program Files (x86)\4dsp\Common\Firmware\Recovery\418_ml605_fmc151

Attached is the text file of the running the program.

What is the serial number of your FMC151. What is your current input to the ADC (frequency, voltage, signal type)? Can input a simple sine wave at around 20 MHz from a function generator? Can you do a loopback from the DAC and post the capture text file?

"When I am sending in a sine wave through the ADC, and outputting that same sine wave through the DAC, I am hooking that output up to an oscilloscope. "

That isn't possible with the firmware/software as is, have you made any modifications? The sampling rates and bit width of the ADC and DAC don't match so it is better to do the other away around for testing, DAC to ADC, not ADC to DAC. If you look at the FMC150xAPP it will generate a sine wave in software and load it to a block ram inside the fpga to play back out the DAC, then it will capture samples from the ADC.

Hi,
At this point, I'm not even sending anything through the DAC anymore, I'm just using the FMC15XAPP to read the raw data, I just what I'm sending in.

I hooked up the DAC output to the ADC and ran the program again, however once again, no cigar.

I haven't made any modifications, I am just using the bit file located at
C:\Program Files (x86)\4dsp\Common\Firmware\Recovery\418_ml605_fmc151

Before I was using the avnet design, which allows for forwarding of the ADC signal, but I can assure you that I am now using the 4dsp one.

However, despite the design I use, I am getting the same bad-looking result.

Attached is the adc data result of running the program with the DAC hooked up to ADC.

Since it has a high frequency, I have only attached a graph of the first 200 samples or so, but I will attach the text file as well if you want to look at all 16,384. 

As you can see, still choppy.

Hi Erik,

That might be a problem with the settings of the IODELAY tap values for FPGA on the pins where the ADC data and clock are coming in. This could happen for example if you have a different revision of the ML605 than was used in making the software (because the routing could be different).


If you look in main.cpp those settings are set on line 386

Code: [Select]

    // Default number of cards is 1 per board - exception is for PC720 which could have two
    numFmcCards = 1;
    odelay_tap = 0;
    switch (constellation_id)
    {
    case CONSTELLATION_ID_ML605:
    case CONSTELLATION_ID_FMC151_ML605:
        printf("Found ML605 hardware\n\n");
        tapiod_clk = 0x00; tapiod_data = 0x00; /// T
        break;


Can you try changing the line 386 to some of the each of the settings below and let me know if you see any improvements in samples the ADC is sending to the FPGA.

// try adjusting clock tap
 tapiod_clk = 0x07; tapiod_data = 0x00;

tapiod_clk = 0x14; tapiod_data = 0x00;

tapiod_clk = 0x21; tapiod_data = 0x00;

// try adjusting data tap
tapiod_clk = 0x00; tapiod_data = 0x07;

tapiod_clk = 0x00; tapiod_data = 0x14;

tapiod_clk = 0x00; tapiod_data = 0x21;

Regards,
Luis

Do I need to have visual studio to recompile the main.cpp?