Thank you very much for the reply.
In my opinion as a customer who is familiarizing with Steller IP, a reference design should be as simple as possible, eg: generating a sine wave/square wave etc. Another reference design could be provided to do the ADC conversion and viewing the graph in chipscope. AXI4-Streaming to StellarIP Interface tutorial involves lot of IP creation, port mapping of lot of signals in VHDL. The tutorial had lots of mistakes as well.
A reference design provided by Avnet is much simpler : Generating a impulse signal which is fed back to an FIR filter via an ADC which compares the received data with a golden model from matlab. But the project is made for kintex 7 in planahead and once project settings are changed to ml605, the tool gives lots of error in the implementation (as there is a mis-match in the UCF and IP cores).
As you said, integrating Steller ips to XPS is not very straight-forward. Hence, I would request a reference design to interface required IP's with a microblaze based design.
regards,
Paul