Hi - Can anyone point me to documentation on how the I2C to SPI bridge works on FM160? I have a I2C controller in FPGA on KC705 and I can read the version and status from the CPLD which seem to indicate that the I2C interface works. Can I write to CPLD registers 0x07, 0x06, 0x05 and 0x04 one byte at a time and the write to the control register at 0x00 to perform the necessary SPI operations? Or do I need to write all 4 bytes at the same time starting with address 0x04 (and send 4 bytes one after another)?
The DAC on FMC160 has a version ID at address 0x7F. To read this, I'm doing the following:
Write to 0x07 with 0xFF
Write 0x00 to registers 0x06, 0x05 and 0x04.
Now the internal 32-bit word is 32'hFF_00_00_00
Now I write 0x04 to control register at 0x00 (I get an ack from CPLD for all these operations)
I am assuming this starts a DAC SPI cycle of 16 bits with bits [31:16] shifter out serially
to the DAC MSB first. This should initiate a read cycle of address 0x7F of the DAC and the
version number 0x07 should be read back. To verify this, I then read registers 0x04 and 0x05, these all read zeroes.
Are there any instructions or user guide to use this interface if I am not using 4dsp software? Can I get a schematic
of the board? (or at least CPLD to DAC/ADC/PLL interface)?
-Venka