Topic: Details about on-board reference clock  (Read 23632 times)

arnaudNL April 01, 2014, 04:59 AM (#15)

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Dear Sir,


I have checked both reference designs and the clocking scheme is different. On the Zedboard-FMC30RF design (Avnet reference design), everything is clocked on FCLK0 which is set to 50MHz. In the 4DSP reference design everything is clocked on FCLK2 which is set to 125MHz.


So you can either modify the software, in order to use 50MHz for you calculation because this is what you have right now or modify FCLK0 to be 125MHz and then re export the design to SDK so you get an updated ps7_init.tcl file. The booting of the Arm, including setting PLLs is done by this tcl file. In your case you changed FCLK0 to 125MHz but you have not exported to SDK, so you were still using the old ps7_init.tcl setting up FCLK0 to 50MHz, I guess it now makes sense. Everything works fine on 50MHz besides the frequency display, actually the Avnet reference design only comes with a GUI to display spectrum and this is why this problem was not spotted earlier.


Best Regards,
Arnaud

arnaudNL June 13, 2014, 07:37 AM (#16)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.