Topic: Reference Design for multi-channel ADC data crossed over to a common clk domain  (Read 1926 times)

eee558 March 14, 2014, 05:54 AM

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Hi,


Does 4DSP provide any reference design for an FMC having a multi-channel ADC, say an FMC 168, where the data from all the ADC channels are brought to a common clk domain from their individual domains. I would be interested to see such a reference code for any carrier board, preferentially ML605, where all the individual channel clock inputs and data are passed through appropriate buffers, IDELAYs, MMCM...etc and the data is available in a single common clock domain.


thanks
erol

arnaudNL March 14, 2014, 09:07 AM (#1)

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Dear Erol,


The reference design is only meant to offload snapshots and this is why the firmware is not synchronous.


The answer is no unfortunately. You can still contact saleseurope@4dsp.com to purchase such a design, then 4DSP would be working on these aspects for you.


Best Regards,
Arnaud

arnaudNL June 13, 2014, 07:32 AM (#2)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.