Topic: SIP_FMC_CT_GEN usage in FMC116 Ref. Design  (Read 5050 times)

vicmarher November 28, 2013, 08:35 AM

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Hi all!


I've updated FMC116 Reference Design, replacing sip_mac_engine for my own star, communicating through AMBA to an IP-CORE that LEON3 can access. It means I don't need ethernet at all, cos everything runs inside my board (Xilinx Virtex ML605)


Trying to understand the usage of sip_fmc_ct_gen,  I cannot see connections of the resulting clocks in the ref design, and I read in doc files that main purpose is offer a clock and trigger signal during factory tests. Besides, rx and tx are supposed to be used with ethernet, and as said before, I don't need it.


So my questions are:


1.- Is this star really used/needed in the Ref Design?


2.- what is it used for if yes?


3.- If not used, I understand It can be deleted with no consequences off course ;)


4..- Why when reference soft executes, when printing trigger frequency, a value of 0.2Mhz is shown?
      I can read in doc "The trigger output is connected to the command clock. This results in a 125Mhz single ended output".
      I assume the printed one is another trigger clock, may be the external one. Or may be is just the result of calculate the
      frequency of soft triggers during execution time?


5.- I assume that the star is "just a wrapper" to GTX Wizard generated core, so it can be used as a PLL to produce any clock signal. Is that right?


Thanks once more!!!
Víctor Martín, IEEC



arnaudNL November 28, 2013, 09:11 AM (#1)

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Dear Victor,


ct_gen is indeed a wrapper around some xilinx element able to generate a clock and a trigger. It actually outputs these on ML605/VC707 connectors and you can use these connectors to connect on the FMC clock/trigger.


0.2MHz indicates that nothing is connected. The trigger frequency displayed for tirgger comes from the trigger connector on the FMC board, not from the command clock. That's the way we verify external clock/trigger, using ct_gen


Best Regards,
Arnaud

vicmarher November 28, 2013, 11:36 AM (#2)

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Hi Arnaud, many thanks!


Then, can you please confirm if  in reference desing signals from sip_fmc_ct_gen are not used/needed?


Thanks!


Víctor

arnaudNL November 28, 2013, 11:55 AM (#3)

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Hello Victor,


It is difficult for me to tell you if you need that in your design or not. I would say, if you don't want to have on board clock/trigger generated, then you don't need that module.


Best Regards,
Arnaud

arnaudNL November 28, 2013, 11:55 AM (#4)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.