Is it possible to configure VC707 & FMC30RF without PC?

Dear 4DSP,


I am a college student in China and my graduation task is to configure VC707 & FMC30RF without PC, which means that my teacher wants me to modify the reference design with Xilinx ISE and set some fixed configuration on the cards. I am not sure if it's possible to do so and I find the simulation in ISE Project Navigator is rather confusing. If I want to do as my teacher requests, how should I start with the simulation project in Xilinx ISE(vc707_fmc30rf.xise)?


Thanks!

Dear Sir,


The simulation environment is covered by the CDxxx document part of the firmware source code. It describes how to launch the simulation.


There would be several ways to waive out the "life support", detailing these modifications is far beyond the scope of technical support but I will provide you with a few pointer with a big pleasure.


The first method would be to create/modify Xilinx ROM Init core part of the reference design with your own doctored values. You can figure out all the write required by analyzing the software source code or modify the software in order create a write operations table with the required values and addresses.


The second method would be to replace the mac engine star with a state machine star you create on your side. Then you would also be able to bring the chipset alive. This would also require a write operations table.


I hope that helps!


Best Regards,
Arnaud

Dear 4DSP，


Thanks for your help!


I am sorry but I may not fully understand the Reference Design and the implementation&simulation in Xilinx ISE Project Navigator before.


I read the simulation and implementation in Xilinx ISE Project Navigator these days and I came up with a solution. I don't know if it's possible to accomplish the goal as my solution:


The reference firmware comes with an ISIM test bench that uses a behavioral model for the MAC engine (Ethernet interface). The sim_cmd.sip shows the detailed read/write process in Resetting clock, performing phase alignment, waiting, setting the burst number and burst size, enabling ADC and DAC, sending a load command, sending bytes to DAC Waveform Memory, sending arm command and sending software trigger command. I realized that the read/write process in the simulation is not as much as that of the visual studio project, so I want to know if the missing part in simulation is using the default configuration.  If I insert the read/write process in sip_cmd.sip into the implementation(ie the reference firmware), is it possible to accomplish the goals that configure the cards in a certain fixed configuration? or should I figure out all the read/write process such as CDCE62005 initialing and TRF3765 initialing happened in Visual Studio project in the FMC30RFAPP? I don't know if the write/read process is enough in sim_cmd.sip when I want to configure the cards in a certain fixed configuration.

Sorry for my poor English.
Thanks!


Best Regards,
Ricky

Dear Ricky,


The sip_cmd.sip is suited to simulate data paths and command paths but is not a full blown simulation, typically CDCE chips are not configured.


The best way to go is to modify sipif.cpp, function sipif_writesipreg() so it writes a line in a text file each time it is called. Just write the address passed as argument and the value passed as argument. This will create a list of all the write operation required to bring the chip set alive.


Having this list of write you could modify the firmware to not receive these write from Ethernet but you could create a sip_init_fsm star pushing all the register writes from a constant table.


I hope that helps!


Best Regards,
Arnaud

Dear Arnaud,

Thanks for your kind help. According to your suggestion, it seems that I need to collect all the detailed address and values when function sipif_writesipreg() is called. I was going to call printf() every time when the sipif_writesipreg() is called at first. I find your suggestion is much better by modifying the sipif_writesipreg()  but I need to make it clear what the project configures when a line is written in the text file, which must take a lot of time.   Or is it possible that writing the detailed values and address to the register directly is enough to set the chip alive? I mean is there any necessary time constraint such as wait process? or what if the project write 2 different values into an address during different time period.

Thanks for your kind help these days!

Best Regards,
Ricky

Dear Ricky,


I guess blindly doing all the writes the same should get the chip up and running. If you want need to time information, then use windows API to time stamp all the writes in the file, then you get address, value as well as time sent (as seen by the program init).


In theory, if you know 500 writes bring the chip set alive, doing these 500 writes not from a mac_engine but from a state machine should do the same.


To go back to the list, a day I had to produce such a table for another FMC product. I modified the software to create a CSV file, each time the function would be called it would add a line in the CSV file. I would have ultraedit configured to automatically reload the file when changed. Then what I would so is:


1) Step over the call to sipif_writesipreg()
2) Go to ultraedit and add a comment on the last column (after the last comma), ie clocktree write, adc init, etc..
3) Would be saving the file in ultraedit and loop to 1).


It might look cumbersome but this is faster than figuring out all the register by yourself, the FMC30RF is without doubt the most complex chip set in 4DSP portfolio.. From that table you will modify values and create a new table.


I hope that helps,
Arnaud

Dear Arnaud,

Thanks for your quick and kind help! I will try by modifying the sipif_writesipreg() function.


Thanks!


Best Regards,
Ricky

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