Hi,
thanks for your reply.
I was trying to explore this more and I ran into some issues.
I tried to build the kc705_fmc126.xise file with Xilinx ISE 14.7 (in Windows
1) I ran into this
MapLib:30 - LOC constraint V26 on phy_rxer_0 is invalid: No such site on
the device. To bypass this error set the environment variable
'XIL_MAP_LOCWARN'.
so I set the Variable, but then I got several other errors like this one
2)
ERROR:Place:1119 - The I/O components "bd_p_0<4>" and "bd_n_0<4>" are the P- and
N-sides of a differential I/O pair. The component "bd_p_0<4>" needs to be
placed in a IOBM site and component "bd_n_0<4>" in the adjacent IOBS site
within the same I/O tile. The following issue has been detected:
Can you help tackle this
thanks