Hello Vins,
3k$ might look expensive, but I assume you guys will spend around 90 man days ( if you get skilled engineers ) to get it right including a lot of ping pong with E2V assuming E2V agrees to help you out.
There are many other things, clock domain crossing, sample accurate triggering, etc.. People tend to not anticipate those even if this is the tougher aspect of a firmware design.
You will need:
- Sample accurate triggering.
- Synchronous acquisition.
- Tuned data buses (IODelay calibration) ( the ADC bits should be synchronous in the digital domain ).
- Calibrate E2V chip for phase.
- Calibrate E2V chip for offset.
- Calibrate E2V chip for gain.
- Reconstruct the final signal.
- Have a well defined test instrumentation ( which signal generators and which filters ).
Of course everything is possible as you have source code of everything (software and firmware), the documentation and you can request the calibration application notes from e2v.
Unfortunately I cannot do more for you. Feel free to post on the forum if you have any problems running the reference design. As explained to you, the data router eats data, the amount of data eaten will depend on the Windows non real time feature so the channels are not synchronous by design so this is not a problem, this is simply how it is.
Thank you for your understanding and best regards,
Arnaud