Topic: PLL not locked, but clock outputs seem OK  (Read 12915 times)

bruceyu January 24, 2014, 10:28 AM (#15)

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For anyone in a similar situation, you can put all configurations in the initialisation process, and the PLL would be locked if the configurations are all correct.

arnaudNL January 24, 2014, 02:06 PM (#16)

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I will forward the comment to the firmware engineering team!

arnaudNL January 24, 2014, 02:07 PM (#17)

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This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.