Topic: output voltage variations  (Read 7019 times)

mahturk October 02, 2013, 03:28 AM

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Hello,


The output voltage amplitudes varies when the frequency of the sinus in reference design changes. Especially when the frequency is about 10 MHz, the p2p voltage is about 300mv which is too far away from 1Vp2p. When the frequency is about 40MHz, the amplitude (700mv) is still lower than 1Vpp. What may be the reason of it? Is it caused by the reference design or the hardware issues on FMC204?


Thank you. 

peter October 02, 2013, 10:02 AM (#1)

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Hello,


Sorry to hear that the product does not bahave as you expect. Could you provide me with the files "dac0.txt" and "dac1.txt" generated by the reference design after you ran it? Have you verified if these sample files contain samples that show full scale values?


Thank you,
Peter

mahturk October 02, 2013, 10:25 AM (#2)

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Hello,


the sample file DAC0.txt is attached. Also the scope image is attached. Here i wanted to obtain 10.42MHz signal but as you see from the scope image the amplitude is about 400mv and the signal is not a pure sinusiod.


Thank you.

peter October 02, 2013, 03:46 PM (#3)

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We are going to look into this. Do you see the same on the other channel?


Peter

mahturk October 02, 2013, 04:09 PM (#4)

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Yes, same signal on all channels. However when i increase the frequency (at about 60 mhz) of the sinusoid the signal becomes a pure sinusoid. İ can share scope images for different frequencies.

peter October 07, 2013, 09:35 AM (#5)

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Hello,


In the reference design the DAC buffer is repeated, therefore there need to be a integer number of periods in your buffer.


About the output level, we tried your file and it looks ok on our end. Do you run one of our reference designs? If yes, which carrier board do you use?


Peter

mahturk October 07, 2013, 09:58 AM (#6)

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hello Peter,


i ran it on ml605.
If you got the correct result on scope, what may be the reason of my corrupted signal?


thank you

peter October 07, 2013, 10:46 AM (#7)

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Could you copy the console output of the reference application and post it here?
Have you made any changes to the reference design?


When not modified the reference design should result in an output signal around 63MHz.


Peter
  • « Last Edit: October 07, 2013, 09:55 PM by peter »