Topic: FMC126 pin issue?  (Read 9874 times)

sasquatch August 20, 2013, 07:26 PM

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Hello,

I was able to run the Fmc12xApp.exe with my VC707 with FMC126 in HPC_1 position successfully.  However, when I look at the ADC data for the 4 channels, it appears that one of the bits in one of the channels is always '1'.  It is pin dd_p_0<5>

(from reference design .ucf file)
NET "dd_n_0<5>" LOC="J23" |IOSTANDARD = "LVDS" |DIFF_TERM = TRUE;
NET "dd_p_0<5>" LOC="K23" |IOSTANDARD = "LVDS" |DIFF_TERM = TRUE;

Is it possible there is a layout or .ucf error on Xilinx and/or 4DSPs part?  Or is my pin possibly damaged?

I checked the data on all 4 channels with the flashing 11 pattern, and saw that when the sample was not 0x7ff, it was 0x020 for channel D, meaning that bit 5 is always '1'.

Thanks!


sasquatch August 20, 2013, 07:28 PM (#1)

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To add some information, I have board r2.0 of the FMC126 and I am using fans to cool the module.  The temperature is a stable 75C according to the Fmc12xApp.exe diagnostics run to run.

Thanks.

sasquatch August 20, 2013, 07:46 PM (#2)

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Sorry for the multiple posts.  I'd like to add that the chan D, pin 5 stuck high behavior is repeatable after cycling board power, and reloading the .bit file to the V7 FPGA.  I also tried removing the FMC module from the VC707 and re-inserting it (while power was off of course) and the behavior persisted.

Thanks.

arnaudNL August 21, 2013, 09:14 AM (#3)

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Dear Sir,


Would you have another VC707 or maybe a ML605 to test on? This would already rule out the FMC card.


Best Regards,
Arnaud

sasquatch August 21, 2013, 02:54 PM (#4)

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Hi Arnaud,

Thanks for your reply.  I have a KC705 and ML605 to test with in addition to the VC707.

I tried the KC705 first with 253_kc705_fmc126.bit and with Fmc12xApp.exe, but was getting a timeout error around line 345 of main.cpp (see below excerpt) where the code attempts to obtain the sipcid table.

/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
    // Obtain and display the sip_cid informations to the console. This function also check that the constellation ID
    // obtained by the firmware match the value passed as argument
    rc  = cid_init(0);
    if(rc<1) {
        printf("Could not obtain sipcid table (error %x), exiting\n", rc);
        sipif_free();
        return -3;
    }


I tried running the code and this error was repeatable.


I next tried the ML605 and was able to successfully run Fmc12xApp.exe (see attached screen capture of the cmd window output), and although there were no errors reported by the pattern check after idelay calibration, when I look at the ADC data from the subsequent DMA transfers in Wireshark, it looks like there are patterns other than the flashing 11 (0x7ff) in the chan D (ADC3) data.  See attached screen capture of Wireshark for good chan C and bad chan D data.  I commented out a small segment of code in lines 337-349 of fmc12x_adc.cpp to keep the ADCs in the flashing 11 test mode for the subsequent DMA transfers, but the code is otherwise the original Fmc12xApp.exe.

I have also attached the screen captures of the cmd window and Wireshark data for the VC707 with FMC126 case, so that you can see the constant pinning of chan D, bit 5 to the high position.  I will add these to the next post since the attachment limit is 4 per post.
  • « Last Edit: August 21, 2013, 03:17 PM by sasquatch »

sasquatch August 21, 2013, 03:15 PM (#5)

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Here are the Wireshark captures for chan A (ADC0) and chan D (ADC3) with the VC707 with FMC126.  Chans A, B, C all had values other than 0x7ff in the DMA transfer data.  Chan D (ADC3) shows the constant '1' for bit 5.  For chans A, B, C, it seems the pattern is always 0x3ff instead of 0x7ff, and that there are occasional 0x400 instead of 0x000, which corresponds to errors with the most significant bit, bit 10.

Any ideas what is going on?

One other thing is that the PGOOD LED on the FMC126 never illuminates, although the pg_m2c_0 pin is high according to the value returned inside the FMC12x_ctrl_probefmc function in Fmc12xApp.exe

The CPLD LED does illuminate to blue.

Thanks a lot!
  • « Last Edit: August 21, 2013, 03:39 PM by sasquatch »

peter August 27, 2013, 01:59 PM (#6)

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Dear Sir,


Sorry for the delay in response. The silk screen on this board is swapped between the LEDs. Therefore the power good led is on and the CPLD led is off, which is normal behavior.


Our test records shows clean FFT results, which would not be the case when there is a bit stuck. Could you confirm your serial number (sticker on the FMC126) so I can make sure I look at the right test report.


Would you be able to run the ML605 reference design with a sine wave attached to channel D and provide me with the file "adc3.txt". This file is generated in the application directory after running Fmc12xApp.exe.


Thanks in advance,
Peter

sasquatch August 27, 2013, 03:38 PM (#7)

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Hi Peter,

Thanks for your help.  I ran Fmc12xApp.exe with the ML605 + FMC126 with a 100 MHz sine wave at -3 dBm power input to chan D.  I've attached the raw data files and the matlab script I plotted them with (next reply due to 4 attachment limit).  The adc3 data looks good.  The signals at 200 and 300 MHz are harmonics of the signal generator.

So it looks like it could be my specific VC707, or possibly VC707s in general.  Do you have a VC707 to test with an FMC126 to check?

Btw, my serial number for my FMC126 is 1981.

Thanks!

sasquatch August 27, 2013, 03:40 PM (#8)

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Here's the .m file and screen capture of the fft results.

peter August 27, 2013, 03:49 PM (#9)

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Hello,


Could you repeat the same tests on the VC707 and attach the .txt file?


Thank you,
Peter

sasquatch August 27, 2013, 04:17 PM (#10)

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I repeated the test with the VC707 + FMC126 and now the bit appears to be "unstuck"...

I have been visually checking the FMC connectors to make sure there is no debris or damage to any of the pins, and did not see anything wrong.

I'm not sure what was causing this, but the issue seems to have disappeared for now.  Sorry to have wasted any of your time, and thanks for the help!

sasquatch August 27, 2013, 04:19 PM (#11)

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Here's the screen capture of the ffts in matlab.

peter August 27, 2013, 05:38 PM (#12)

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No problem, glad to help!


Peter