Topic: Fmc12xAPP address question  (Read 4114 times)

sasquatch August 14, 2013, 05:15 PM

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Hello,

I'm trying to understand some register writes in the cpp file:

C:\Program Files (x86)\4dsp\FMC Board Support Package\Refs\Software\FMC12x\main.cpp


Starting at line 527:

// Calculate BAR of every peripheral mapped (sub mapping) to the FMC12x star's memory. This uses fixed offsets given by the FMC12x
    ULONG AddrSipFMC12xCtrl      = AddrSipFMC12x + 0x000;
    ULONG AddrSipFMC12xAdcPhy    = AddrSipFMC12x + 0x010;
    ULONG AddrSipFMC12xFreqCnt   = AddrSipFMC12x + 0x600;

    ULONG AddrSipFMC12xBridge    = AddrSipFMC12x + 0x1000;
    ULONG AddrSipFMC12xClkSpi    = AddrSipFMC12x + 0x1000 + 0x100;
    ULONG AddrSipFMC12xAdcSpi    = AddrSipFMC12x + 0x1000 + 0x400;
    ULONG AddrSipFMC12xCpldSpi   = AddrSipFMC12x + 0x1000 + 0x600;

    ULONG AddrSipFMC12xI2cMaster = AddrSipFMC12x + 0x10000;
    ULONG AddrSipFMC12xTempMon   = AddrSipFMC12x + 0x10000 + 0x4800;

    // Configure I2C switch
    if( cid_getconstellationid() == FMC122_CONSTELLATION_ID_ETH_KC705) {
        sipif_writesipreg(AddrSipFMC12xI2cMaster+0x7400, 0x04);   
        Sleep(20);
    }
    else if( cid_getconstellationid() == FMC126_CONSTELLATION_ID_ETH_VC707) {
        sipif_writesipreg(AddrSipFMC12xI2cMaster+0x7400, 0x02); // Switch set to HPC_1   
        Sleep(20);   
    } 
   .
   .
   .


I can see from the corresponding .vhd firmware files where all of the addresses are coming from up to and including the AddrSipFMC12xTempMon address, but in the following register write, it looks like a register at 0x7400 relative to the I2C Master address is written to.  I don't see any documentation for devices higher than address x5000 relative to the I2C Master address, which is the I2C EEPROM base address (24LC02B chip).  The ADT7411 chip has address x4800 relative to the I2C Master, but I don't know of any device at 0x7400.

What is this register write supposed to be doing?

Thanks!
Sasquatch

sasquatch August 14, 2013, 05:29 PM (#1)

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Also, I checked the document version of

\4dsp\firmware\267_vc707_fmc126_cal\star_lib\sip_fmc126_cal\doc\SD103(sip_fmc126_cal).pdf

and it is Revision 1.0, dated 11/22/2011.  This is the document that states the addresses of the I2C Master on page 10, with the highest address being the 24LC02B at x5000.

Thanks.

arnaudNL August 15, 2013, 04:05 AM (#2)

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Dear Sir,


These writes actually configure the i2c mux chip populated on VC707/KC705. These xilinx boards have a chip one can configure to route the main i2c bus towards several sub i2c buses. Typically here we are routing to HPC1 I believe.


More information can be found in the VC707 User Guide.


Best Regards,
Arnaud