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Stucture of 64-bit data words, SD062 FMC104 Star

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KevinNIST:
Hello,
I would like to know more about the stucture of the Out_data(63:0) port of the FMC104 Star. A verbatim description from section 3.6:"The 14 bits data from each ADC channel is left justified to 16 bits and de-multiplexed to 64 bits. The 64 bits data is synchronised to the cmd_clk clock domain and mapped to the ADC ouput wormholes. There are 4 output wormholes that carry the ADC data, one for each ADC channel. The wormhole names are adc0, adc1, adc2 and adc3. The description of the wormhole is given in the next table."
I'm guessing that each 64-bit work contains 4 consecutive samples from the ADC? Bits (63 downto 50) are sample @ t=0, bits (47 downto 34) @ t=4ns, bits(31 downto 18) @ t=8ns, and bits(15 downto 2) @ t=12ns for instance?
Could you show in a table or chart exactly what the word format is, which bits are most significant, least significant, etc?
 
Thanks,
-Kevin
 

Kyu:
Kevin,


Yes, each 64bit wormhole contains 4 consecutive ADC samples. Each sample is 16bit data with two's complement format. It's left justified. MSB is the bit 16 and bit[1:0] should be zero. The sample order is [63:48]=1st, [47:32]=2nd, [31:16]=3rd and [15:0]=4th samples.


Thanks,
Kyu

KevinNIST:
I'm confused again while reading the 4DSP documentation. In reference to my original post, I was under the impression that each 64-bit data word contains data for four consectutive samples of data in TIME from a SINGLE CHANNEL. Is this assupmtion correct? Or, is it that each 64-bit word contains four concurrent samples of data from four different channels? Please clarify.
Again, a chart is worth a thousand words if you can provide one.
 
Thanks,
-Kevin
 

KevinNIST:
... A follow-up question... If a 64-bit biit work is in fact 4 consectutive time samples from a single channel, does that mean that the Cmdclk is a frequency 1/4 of the sampling rate?

Kyu:

Kevin,


It contains 4 consecutive samples from a single channel. Cmdclk is not related to the sampling frequency. It's a clock that synchronizes commands wormhole. Basically, a trunk of the captured ADC data is stored into a FIFO at ADC phy clk. Then, it reads 4 captured ADC data from the FIFO at cmdclk and send data to the host computer.


Thanks,
Kyu

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