Hello,
I would like to know more about the stucture of the Out_data(63:0) port of the FMC104 Star. A verbatim description from section 3.6:"The 14 bits data from each ADC channel is left justified to 16 bits and de-multiplexed to 64 bits. The 64 bits data is synchronised to the cmd_clk clock domain and mapped to the ADC ouput wormholes. There are 4 output wormholes that carry the ADC data, one for each ADC channel. The wormhole names are adc0, adc1, adc2 and adc3. The description of the wormhole is given in the next table."
I'm guessing that each 64-bit work contains 4 consecutive samples from the ADC? Bits (63 downto 50) are sample @ t=0, bits (47 downto 34) @ t=4ns, bits(31 downto 18) @ t=8ns, and bits(15 downto 2) @ t=12ns for instance?
Could you show in a table or chart exactly what the word format is, which bits are most significant, least significant, etc?
Thanks,
-Kevin