Topic: FMC645 ISE project files  (Read 6046 times)

zeevs June 21, 2013, 03:37 AM

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I've opened ISE file of the VC707_FMC645 project (...\255_vc707_fmc645\output\vc707_fmc645_x485t\vc707_fmc645_x485t.xise)


The files are not linked in the ISE file, so I needed to add them one by one
Still I was not able to find the file "system" that instantiated in sip_vc707_ub_fmc645.vhd


Where this file can be found?
Do you have ISE file that does have all the files linked inside?


Thanks


Zeev



arnaudNL June 24, 2013, 07:37 AM (#1)

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Dear Zeev,


StellarIP creates everything fine but this assumes you are using the right ISE version (14.2). You need to install ISE 14.2 and configure path to 14.2 in StellarIP.


This is about EDK flow being very strict about the version to use.


You will also need to delete what is contained by 255_vc707_fmc645\output folder but keep the output folder in there after changing the version.


star_lib\sip_vc707_ub_fmc645 contains ALL the vhdl required for the microblaze star. Keep in mind this star is a Xilinx EDK system wrapped into a StellarIP star might be a bit different; Typically the EDK netlist are created by EDK which is called by ISE and we have a wrapper around.


Best Regards,
Arnaud

zeevs June 24, 2013, 08:31 AM (#2)

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Hi Arnaud,

We are using ISE 14.3. Is it OK? Should we use older version?


Thanks


Zeev

arnaudNL June 24, 2013, 09:28 AM (#3)

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Hello Zeev,
The easiest way would be to install 14.2 but you might be able to simply open the system.xmp from your star_lib\sip_vc707_ub_fmc667\EDK\vc707
This should offer you to convert the system.xmp towards 14.3. Then delete the content of your output folder, leaving output folder an empty folder. Then retry pressing "Generate" in StellarIP.
Let me know how that goes.
Best Regards,
Arnaud

zeevs June 27, 2013, 03:12 PM (#4)

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Hi Arnaud,
I installed ISE version 14.2, but the situation is the same.
When I open (...\255_vc707_fmc645\output\vc707_fmc645_x485t\vc707_fmc645_x485t.xise) file, ISE cannot locate and link between the project files.
Attached is the screenshot of the ISE project.
Thanks
Zeev

arnaudNL June 28, 2013, 04:44 AM (#5)

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Dear Zeev,


Can you make sure that:


1) You configured StellarIP to use ISE 14.2 via the extra settings button in the GUI.
2) You browsed to a XML library and not a TCLIB library.
3) You browsed the XML library in the firmware 255.
4) You empty the output folder before pressing generate (this is required when wrong firmware version were used)
5) You have not changed the folder architecture of the firmware.


I have been trying to recompile the firmware just before and it works as a charm.


Best Regards,
Arnaud

arnaudNL June 28, 2013, 05:46 AM (#6)

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Dear Zeev,


I also see that you are using space in your path and this is not supported by Xilinx tools properly.


Here is a quote from the FMC645 user manual (chapter 10.4)


Quote
As Xilinx tools do not support spaces in the file names, it is required to copy the firmware folder on a local path without spaces. The firmware folder should be copied from “C:\Program Files\4dsp\Common\Firmware\Extracted\196_ml605_fmc645\” to “C:\Dev\Fw\” yielding in C:\Dev\Fw\196_ml605_fmc645_lx240t


On your side you are using something like " - Rev2" which is not going to work as this path has spaces..


Best Regards,
Arnaud

zeevs June 28, 2013, 10:49 AM (#7)

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Hi Arnaud,


Thanks for your help.


I've proceeded according to your instructions.
Attached are screenshots from 4DSP Control GUI with settings. I hope they are correct.
I copied output directory to D:/ and eliminated space from the file path.
Now when I open the ISE project file, Project Navigator says that the project does not contain any files. I've attached a screenshot of that as well.


Please advise.


Thanks in advance,


Zeev 

arnaudNL June 28, 2013, 11:02 AM (#8)

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Hello Zeev,
Ouch, I am running out of ideas, would you be able to provide me with a teamviewer/logmein access so I can try to look at what is going on in details on your machine.
Normally we do not do that but I believe this will be a faster path for both of us! You can send the login info to support@4dsp.com. It would be wise to decide when I can log on, would Monday morning (Asmterdam time) be fine with you?
Best Regards,
Arnaud

zeevs July 01, 2013, 07:28 AM (#9)

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Hi Arnaud,


after the work you've done the compilation was successful.


Thanks a lot for your help.


Best,


Zeev

arnaudNL July 01, 2013, 09:04 AM (#10)

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Dear Zeev,


Thank you for the feedback. So the main issue was about browsing to the non 64 bit Xilinx path on a 64 bit Windows. As soon this was fixed we could already see complete project.


For the other readers, VC707-FMC645 firmware requires a specific step after Generating with StellarIP. The DDR3 MIG project file (DDR3_SDRAM_mig_saved.prj) should be copied manually from the star library to the output folder.


From star_lib\sip_vc707_ub_fmc667\EDK\vc707


To 255_vc707_fmc645\output\vc707_fmc645_x485t\Src\sip_vc707_ub_fmc645\data


This should be done before to compile the firmware in Xilinx ISE Navigator.


Best Regards,

Arnaud