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Troubleshooting the precompiled bitstream for VC707

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mattgran:
Hi all,

I'm attempting to get some board communication going, but it's not working out so well.

I open iMPACT, and I see the CPLD and the FPGA. I bypass the CPLD (i.e. leave it alone) and program the FPGA with the bitstream from the Recovery directory, "348_vc707_fmc176.bit." I then open a command prompt and change directory over to "Bins." From there, my Fmc176APP.exe returns this output:

--- Code: ---Number of devices found : 2
  0. \DEVICE\{6B0E5B94-39A4-4850-8611-EE527F708A2F}
     - Realtek PCIe FE Family Controller - Deterministic Network Enhancer Miniport
  1. \DEVICE\{39295E7B-A268-4F48-B5A9-3E1252CD8A54}
     - Realtek RTL8191SE 802.11b/g/n WiFi Adapter - Deterministic Network Enhancer Miniport
--- End code ---
Seeing this, I run the command

--- Code: ---Fmc176APP.exe 1 VC707 0 0
--- End code ---
.
However, it returns

--- Code: ---Could not obtain sipcid table (error fffffff), exiting
--- End code ---
I've run through the FAQ and I have done everything it suggests. My jumpers are all in their default positions; the changes I have made are that SW2 is in position 01000000 and SW11 is in 11010. I have successfully run the Xilinx SGMII example from this configuration, so I believe my Ethernet communication is working. When I capture off my Ethernet controller, I see five packets come from QuantaCo_03:eb:a6, addressed to 34:44:53:50:30:31. They appear to be well formed, but I see no response on the line from the board. I've also built a binary from the extracted *.sdf file, but it also produces no output with the same process on the same configuration.


So what am I missing?

Kyu:

It sounds like you have done it correctly. We have seen that running application as administrator or disable the firewall solve the issue. I think we have tested the firmware with the default settings.


Thanks,
Kyu

mattgran:
Thank you, Kyu.


I've tried running the application as an administrator, but I'm still not getting any response from the board. Do you happen to remember the settings you had for the DIP switches on your board?


Regards,
Matt

Kyu:

Matt,


I'm pretty sure that we used the default setting. SW2 is in all zero. SW11 has Flash_A[25:24] = 00 and FPGA_M[2:0] = 010. You can follow the Figure B-2 in the user guide.


Thanks,
Kyu

mattgran:
Kyu,


Thanks for your reply. I have changed my switch positions (amounting to referencing a different starting address in flash), but still no results.  I'm out of debugging ideas at the moment; perhaps it is a hardware issue.


Regards,
Matt

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