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Open support tickets on this forum will remain open with full support until May 31, 2015.
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| Subject / Started by | Replies / Views  |
Last post | ||
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Adding Registers to sip_fmc30rf
Started by kcfarleyswmacb |
1 Replies
7985 Views |
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Reference Design Details
Started by arnaudNL |
0 Replies
9826 Views |
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1 Replies
4123 Views |
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MOVED: AFE7225 PHY issues
Started by arnaudNL |
0 Replies
4194 Views |
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FMC30RF with Xilinx S6
Started by sch |
2 Replies
4248 Views |
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1 Replies
4306 Views |
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Clock mode 1 does not work
Started by rvincentzio |
1 Replies
4351 Views |
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General questions to FMC30RF
Started by m_a01 |
1 Replies
4364 Views |
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What are cid registers?
Started by kcfarleyswmacb |
1 Replies
4371 Views |
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MOVED: High and variable I/Q imbalance
Started by arnaudNL |
0 Replies
4441 Views |
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FMC30RF can not be found by GUI
Started by army |
1 Replies
4509 Views |
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IIC Master Purpose
Started by kcfarleyswmacb |
3 Replies
4541 Views |
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2 Replies
4715 Views |
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3 Replies
4743 Views |
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TRF3765 RFOUT connections and logic
Started by rvincentzio |
1 Replies
4855 Views |
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10 MHz external reference
Started by alexandre |
2 Replies
4896 Views |
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FMC30RF FIFO SAMPLE SWAP
Started by kcfarleyswmacb |
3 Replies
4979 Views |
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2 Replies
5187 Views |
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TX ERRATIC SINE WAVE OUT
Started by kcfarleyswmacb |
3 Replies
5207 Views |
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Clock questions for fmc30rf_if.vhd
Started by kcfarleyswmacb |
4 Replies
5302 Views |
|
These forums will be taken offline, effective March 13, 2015.
Ongoing support will be available at support.4dsp.com
Open support tickets on this forum will remain open with full support until May 31, 2015.
All topics will be archived and available until March 31, 2016
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