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Form Factor PMC (FM Series) FM489 Virtex-5 FM486 Virtex-5 FM485 Virtex-5 FM482 Virtex-4 FM481 Virtex-4 FM577 Cyclone III FM680 Virtex-6 PMC (AD Series) AD490 dual A/D 210MHz AD491 dual A/D 1GHz AD484 four A/D 125MHz AD481 dual D/A 1GHz AD450 A/D D/A 150MHz AD350 A/D D/A 150MHz PMC (VID Series) VID471 full FP-CL VID472 dual FP-CL VID475 JPEG2000 VID371 full FP-CL VID372 dual FP-CL VID375 JPEG2000 VID675 JPEG2000 XMC FM489 Virtex-5 FM486 Virtex-5 FM485 Virtex-5 FM481 Virtex-4 FM680 Virtex-6 FMC FMC103 FMC104 FMC107 FMC108 FMC110 FMC122 FMC125 FMC126 Systems CompactPCI VME PCI Stand alone VPX 3U cPCI 6U cPCI Technology/Function Virtex-6 FM680 Virtex-5 FM489 FM486 FM485 Virtex-4 FM482 FM481 Cyclone III FM577 Video VID471 full FP-CL VID472 dual FP-CL VID475 JPEG2000 VID371 full FP-CL VID372 dual FP-CL VID475 JPEG2000 VID675 JPEG2000 Optical FM489 FM486 FM485 FM482 A/D AD490 dual A/D 210MHz AD491 dual A/D 1GHz AD484 four A/D 125MHz AD450 A/D D/A 150MHz AD350 A/D D/A 150MHz D/A AD450 A/D D/A 150MHz AD350 A/D D/A 150MHz IP Cores IPcores Floating Point FFT Fixed Point FFT Serial FPDP Polyphase filterbank DDC

 

sFPDP Core

Description

4DSP's serial front panel data port core for FPGA is based on the ANSI/VITA 17.1-2003 standard. This intellectual property core can be implemented on any Xilinx FPGA families.

4DSP has produced a full implementation of the sFPDP IP Core in the FM481 Serial Communication Boards. Please go to the FM481 page to see this turn-key implementation of the 4DSP sFPDP IP Core.

Specifications

• Up to 2.5Gbps (using MGTs)
• Up to 230MBytes/s per optical transceiver
• Unidirectional and bi-directional links
• Framing supported: dataflow control, PIO per specification, copy mode, copy-loop mode and CRC
• Fully compliant ANSI/VITA 17.1-2003 SFPDP standard

Target Devices

• Xilinx Virtex-4, Virtex-5, Virtex-6

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Ordering Information

Purchase this core or request more information by sending an email to sales@4dsp.com.

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