JPEG2000 hardware compression system solution
VID475
Description
The VID475 features a JPEG2000 hardware compression solution.
It is based on the ADV212 codec devices suitable for on-the-fly compression prior or after the imaging processing implemented on the Virtex-4 FPGA device.
The VID475 has two Xilinx Virtex-4 FPGA devices and some fast on-board SRAM and DRAM memory resources. It is the most efficient hardware compression solution available with embedded
processing power. The flexibility of the architecture and the use of the Camera-Link standard makes this solution universal for digital imaging systems.
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Features
JPEG 2000 compression with two ADV212 CODEC devices
• Camera-Link Base configuration via two mini CL connectors
FPGA
• High speed DSP processing in two Xilinx Virtex-4 ® FPGA
• XC4VSX55, XC4VLX40, XC4VLX60, XC4VLX80, XC4VLX100 or XC4VLX160
• XC4VFX20 or XC4VFX60 with embedded PowerPC RISC processor
• FPGA configuration on-board storage
• Off-the-shelf IP cores for real time compression (JPEG2000, edge detection)
• FPGA firmware design services available upon request
Memory
• 2 x 32M x 16 DDR2 SDRAM (128MB)
• 4 x 2M x 32 QDR2 SRAM devices (32MB)
• 128Mbit flash device
PCI interface
• PCI-X 64-bit 133MHz, 3.3V
• PCI-X/PCI 64/32-bit 66MHz, 3.3V
• PCI 64/32-bit 33MHz, 3.3V
• PMC Pn4 64 I/O connected to FPGA A
Measured sustained bandwidth
64-bit 133MHz = 760Mbytes/s
64-bit 66MHz = 450Mbytes/s
32-bit 33MHz = 120Mbytes/s
Software Support
• FPGA reference design
• API, documentation and sample source code
• Software utility to program on-board Flash with FPGA configuration data
• Device driver for Windows 2000/XP, Linux and VxWorks
• Test /demonstration application
• Custom FPGA firmware /application /driver development available upon request
Ordering information
Request more information or purchase this module by sending an email to sales@4dsp.com
Downloads
VID475_Programmers_Guide_1.1b.pdf
