800-816-1751
info@4dsp.com
 

Solution Configurator

Technology/Function

Interface

Form Factor

Show IP Cores?

Clear See Results

FMC408

FMC - FPGA Mezzanine Card

Clock and trigger distribution FMC
FMC-LPC 125MHz-4GHz, VITA 57.1 Compliant


FMC408

  • Description

      The FMC408 is a low-noise clock generation and distribution module with 8 clock outputs and 8 trigger outputs fully synchronized. This module can either distribute an externally received clock, or a locally generated clock. The FMC408 can generate any clock frequency between 125 MHZ and 4GHz and lock it to an internal/external reference or a 1PPS signal. A trigger signal received from either the FMC connector or the external trigger input is synchronized to the clocks and distributed to the eight outputs on the front panel. Alternatively, it is also possible to distribute the external 1PPS or locally generated 1PPS signal for data time stamping. The FMC408 is recommended for applications that require synchronous A/D or D/A sampling across multiple cards or systems. With a low-pin count connector, and front panel I/O, the FMC408 can be used in a conduction cooled environment.


      FMC408 Block Diagram
      Enlarge

  • Features
      External clock input and on board VCO
      External reference input and on board reference (100MHz)
      External 1PPS, Sync and Trigger inputs
      Eight synchronized clock outputs (125MHz-4000MHz)
      Eight synchronized trigger or 1PPS outputs
      On-board 1PPS generation for GPS applications
      Fully controllable from FMC connector
      VITA 57.1-2010 compliant
      LPC (Low-Pin Count) 160-Pin Connector
      Mil-I-46058c Conformal Coating Compliant - Optional
      A breakout cable on the front panel makes all clock and trigger signals available on individual coax cables.
      FMC116 connector
      Breakout Cable
      (Enlarge)
  • Board Support Package
      Stellar IP is available for this product. A simple way to design FPGA firmware with automated code and bitstream generation
      Data analyzer makes it possible to display digitized data real time
      Reference designs that work out of the box are available for multiple platforms, please see tables below
      Can be used on any VITA 57.1 compliant carrier card
      User Manual
      Performance Guide
      Private support provided on 4DSP's support forum
      Reference designs available for multiple FPGA carriers
      Download the BSP datasheet for more information
  • Application
      Software defined radio (SDR)
      RADAR/SONAR
      Beamforming
      Wireless communication receivers
      Medical equipment
      Aerospace and test measurement instruments
  • Environmental
      EnvironmentalLevel ALevel B
      Operating Temperature0°C to 70°C-40°C to 85°C
      Storage Temperature-50°C to 125°C-50°C to 125°C
      Humidity-Operating0 to 100% non condensing0 to 100% non condensing
      Storage Humidity0 to 100%0 to 100%
      Vibration Random0.1 g2/Hz
      10 - 3kHz
      0.1 g2/Hz
      10 - 3kHz
      Shock30g peak30g peak
      CoatingNoneConformal

Talk to us about your algorithmic requirements; 4DSP is a full-service firmware and software development house. We are specialists at high-performance FFT and Video Processing. Check with us; we may have IP Cores that meet requirements for your application, right off the shelf.


©2006-2012 4DSP LLC™ All Rights Reserved