FMC161

FMC - FPGA Mezzanine Card

Dual channel 12-bit 1.8Gsps A/D
Or single channel 12-bit 3.6Gsps A/D
FMC VITA 57.1 Compliant

FMC161

  • Description

      The FMC161 provides one 12-bit A/D channel at 3.6Gsps or two A/D channels at 1.8Gsps clocked by either an internal clock source (optionally locked to an external reference) or an externally supplied sample clock. In addition, a trigger input for customized sampling control is available to users. The FMC161 daughter card is mechanically and electrically compliant to the FMC standard (ANSI/VITA 57.1).


      The FMC161 has a high-pin count connector, front panel I/O, and can be used in a conduction cooled environment. The design is based on Texas Instruments' ADC12D1800 Analog-to-Digital converter. The analog signals are AC coupled connecting to MMCX or SSMC coax connectors on the front panel.


      The FMC161 allows flexible control on clock source through serial communication busses. Furthermore the card is equipped with power supply and temperature monitoring and offers several power-down modes to switch off unused functions in order to reduce system level power consumption. It is well suited for low power applications such as airborne where the highest level of performance is required while ensuring that mission range does not get affected.

  • Features
      One ADC12D1800: Single channel 12-bit 3.6Gsps or dual channel at 1.8Gsps
      VITA 57.1-2010 compliant
      Conduction Cooled – Standard Option
      Single ended AC-coupled analog signals
      5 MMCX/SSMC connectors available from the front panel
      4 LVTTL signals available from an HDMI connector on the front panel
      4 Xilinx MGT available from an HDMI connector on the front panel
      Clock Source, Sampling Frequency through SPI communication busses
      Flexible clock tree enables:
      on board VCO: 2200MHz - 4400MHz
      external reference clock
      external sampling clock
      Power-down modes to switch off unused functions for system power savings
      Mil-I-46058c Conformal Coating Compliant (optional)
      HPC – High Pin Count Connector
      LVDS IO signaling

      FMC161 Block Diagram

  • Board Support Package
      4FM GUI offers multiple functions including the ability to monitor voltage and temperature; perform memory tests; measure the PCIe bandwidth; update FPGA firmware; and access StellarIP
      StellarIP available for this product. A simple way to design FPGA firmware with automated code and bitstream generation
      Data analyzer makes it possible to display digitized data real time
      Reference designs that work out of the box are available for multiple platforms, please see tables below
      Can be used on any VITA 57.1 compliant carrier card
      For support, please visit our support forum
      Download the BSP datasheet for more information
  • Application
      Direct RF Down Conversion.
      Software defined radio (SDR).
      RADAR/SONAR.
      Ultra Wideband Satellite Digital Receiver.
      Medical equipment.
      Aerospace and test instrumentation.
  • Environmental
      EnvironmentalAir-cooledConduction-cooled
      ANSI/VITA 47EAC4EAC6ECC1ECC4
      Operating Temperature0C to +55C-40C to +70C0C to +55C-40C to +85C
      Storage Temperature-40C to +85C-50C to +100C-40C to +85C-55C to +105C
      Humidity95%95%95%95%
      Operating Vibration5Hz to 100Hz, PSD = 0.04g2/Hz

      100Hz to 1000Hz PSD = 0.04 gs^2/Hz

      1000Hz to 2000Hz PSD decreasing at 6 dB/ octave
      5Hz to 100Hz, PSD = 0.04g2/Hz

      100Hz to 1000Hz PSD = 0.04 gs^2/Hz

      1000Hz to 2000Hz PSD decreasing at 6 dB/ octave
      5Hz to 100Hz PSD increasing at 3 dB/ octave

      100Hz to 1000Hz PSD = 0.1 g^2/Hz

      1000Hz to 2000Hz PSD decreasing at 6 dB/octave
      5Hz to 100Hz PSD increasing at 3 dB/ octave

      100Hz to 1000Hz PSD = 0.1 g^2/Hz

      1000Hz to 2000Hz PSD decreasing at 6 dB/octave
      Operating Shock20g, 11 millisecond, half-sine or 20g, 11 millisecond, terminal sawtooth shock pulses in all three axes20g, 11 millisecond, half-sine or 20g, 11 millisecond, terminal sawtooth shock pulses in all three axes40g, 11 millisecond shock half-sine or 40g, 11 millisecond, terminal sawtooth shock pulses in all three axes40g, 11 millisecond shock half-sine or 40g, 11 millisecond, terminal sawtooth shock pulses in all three axes
      Operating Altitude-1500 ft to 60,000 ft
      (with airflow)
      -1500 ft to 60,000 ft
      (with airflow)
      -1500 ft to 60,000 ft-1500 ft to 60,000 ft
      Conformal CoatingOptionalOptionalOptionalOptional

Talk to us about your algorithmic requirements, 4DSP is a full-service firmware and software development house. We are specialists at high performance FFT and Video Processing. Check with us, we may have IP Cores that meet requirements for your application, right off the shelf.