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FMC103

FMC - FPGA Mezzanine Card

4-Channel 210 MSPS @ 12-bit
FMC-LPC Analog-to-Digital Converter Board
FMC VITA 57.1 Compliant

FMC103

Description

The FMC103 is a four-channel ADC FMC (FPGA Mezzanine Card) which is fully compliant with the VITA 57.1-2008 standard. The FMC103 card provides four 12-bit 210 MSPS A/D channels which can be sampled by an internal clock source (optionally locked to an external reference) or an externally supplied sample clock. A trigger input for customized sampling control is also available. The FMC103 has the LPC (Low-Pin Count) 160-Pin connector, front panel I/O, and is conduction cooled compliant. The board is also available with Mil-I-46058c compliant Conformal Coating.

Another important featured of the FMC108 is the ability to cascade multiple FMC boards supported by a single clock frequency.

The design is based on the TI ADS62P28 Dual Channel 12-Bit 210 MSPS ADC with programmable DDR LVDS or parallel CMOS (LVCMOS) outputs. The analog signal inputs can be either single ended or differential, AC- or DC coupled connecting to SSMC coaxial connectors on the front panel.

The FMC103 allows flexible control on sampling frequency, analog input gain, and offset correction through serial communication with a carrier card. Furthermore the card is equipped with power supply and temperature monitoring and offers several power-down modes to switch off unused functions.

Features

  • Four Channel 12-bit 210 MSPS A/D conversion
  • Available as air cooled and conduction cooled
  • VITA 57.1-2008 compliant
  • Based on TI ADS62P28
  • LVDS or 1.8V LVCMOS output operation
  • Coaxial front panel inputs on SSMC connectors
  • Single ended AC- or DC-coupled analog input
  • Optional analog differential input
  • Flexible clock tree enables:
    • internal clock
    • external clock
    • cascading multiple boards - Optional
  • LPC (Low-Pin Count) 160-Pin Connector
  • Mil-I-46058c Conformal Coating Compliant – Optional

FMC103 Block Diagram

Support

  • ML605 reference design available.
  • SP605 reference design available.
  • SP601 reference design available.
  • User Manual
  • Performance Guide
  • Reference firmware design (VHDL)
  • Reference ISE project for Virtex-5, Virtex-6 and Spartan-6
  • Email support (support@4dsp.com)

Application

  • Software defined radio (SDR)
  • RADAR/SONAR
  • Wireless communication receivers
  • Medical equipment
  • Aerospace and test measurement instruments

FMC103 Performance Chart

Performance

  • 700MHz Bandwidth (AC)
  • 320MHz Bandwidth (DC)
  • 80dB Cross-Talk
  • 4dBm analog inputs (1Vpp)
  • 0dBm clock input (typ.)
  • (LV)TTL compatible trigger
ENVIRONMENTALLEVEL ALEVEL B
Operating Temperature0°C to 70°C-40°C to 85°C
Storage Temperature-50°C to 125°C-50°C to 125°C
Humidity-Operating0 to 100%
non condensing
0 to 100%
non condensing
Storage Humidity0 to 100%0 to 100%
Vibration Random0.1 g2 /Hz
10 – 3kHz
0.1 g2 /Hz
10 – 3kHz
Shock30g peak30g peak
CoatingNoneConformal

Talk to us about your algorithmic requirements, 4DSP is a full-service firmware and software development house. We are specialist at high performance FFT and Video Processing. Check with us, we may have IP Cores that meet requirements for your application, right off the shelf.


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