FM489 Virtex-5 PMC-X/XMC With BLAST™ Sites
Description
The FM489 is a high performance PMC-X or XMC module dedicated to data acquisition, processing and communication applications with complex requirements. Built on the success of the FM48x series, the FM489 offers two FPGAs: the Virtex-4 and the Virtex-5.
BLAST™ is an innovative and modular technology for the newer high performance FM489 PMC-X and XMC modules. BLAST™, Board Level Advanced Scalable Technology, is a small PCB module that allows customization of the FM489 in memory extensions, processing units and communication interfaces. Each FM489 can be populated by up to 3 BLAST™ modules or none at all.
The User Programmable Virtex-5 is directly connect to three BLAST™ sites which bring out 100 lines of single-ended I/O from the Virtex-5. Customer may selected at time of order 1, 2, or 3 BLAST™ sites loaded with the below BLAST™ Modules. Or, depending on memory requirements, BLAST™ sites may be left open and no BLAST™ mounted.
Custom BLAST™ modules may be defined to meet Customers Specifications, just about any logic that can be supported that require up to 100 lines of single-ended I/O from the Virtex-5. Two or more BLAST™ sites can be used to interface Customer Specific BLAST™ Modules, that may require up to 300 lines of single-ended I/O from the Virtex-5. Contact 4DSP Factory for further details.
BLAST™ modules available:- QDRII SRAM memory device: 1 x 2M x 32-bit (8MBytes)
- DDR2 SDRAM memory device: 1 x 32M x 32-bit (128MBytes)
- DDR3 SDRAM memory device: 2 x 64M x 16-bit (256MBytes)
- ADV212 JPEG2000 compression devices: 2 CODECs
- 32GB NAND Flash (Solid State Drive)
Enlarge diagram | Enlarge photo
Features
Conduction cooled -optional.
FPGA- High speed DSP processing in Xilinx Virtex-5 ® FPGA
- XC5VLX50T, XC5VLX85T, XC5VLX110T, XC5VSX50Tor XC5VSX95T
- Virtex-4 XC4VFX20 or XC4VFX60 with embedded PowerPC processors
- FPGA configuration on-board storage
- Off-the-shelf IP cores
- FPGA firmware design services available upon request
NOTE: FM489 is configurable with 1, 2 or 3 of the following BLAST modules, mounted on BLAST sites (See Block Diagram).
- QDRII SRAM memory device: 1 x 2M x 32-bit (8MBytes)
- DDR2 SDRAM memory device: 1 x 32M x 32-bit (128MBytes)
- DDR3 SDRAM memory device: 2 x 64M x 16-bit (256MBytes)
- 32GB NAND Flash (Solid State Drive)
- PCI-X 64-bit 133MHz, 3.3V
- PCI 64/32-bit 66MHz, 3.3V
- PCI 64/32-bit 33MHz, 3.3V
64-bit 133MHz = 760Mbytes/s
64-bit 66MHz = 450Mbytes/s
32-bit 33MHz = 120Mbytes/s
I/O and Front Panel Interface
- PMC connector Pn4 64 user I/Os, 32 LVDS pairs or 64-bit single ended
- Front Panel I/O daughter cards (see table below))
- Rocket I/O Connector (4 MGTs)
Front Panel Data Port |
FP-FPDP |
1Gbytes DDR2 SDRAM |
FP-DDR1G |
Camera link |
|
JPEG 2000 compression |
|
LVDS 32-pair |
|
2 A/D ch 150MSPS & 2 D/A ch 500MSPS |
|
4 A/D ch 125MSPS |
ADC284 * |
2 A/D ch 210MSPS |
ADC290 * |
2 A/D ch 1GSPS |
ADC291 * |
2 D/A ch 1GSPS |
DAC281 * |
- FPGA reference design
- Software GUI for card control
- Software utility to program on-board Flash with FPGA configuration data
- Device driver for Windows 2000/XP, Linux and VxWorks
- Test /demonstration application
- Custom FPGA firmware /application /driver development available upon request
- Real-time DSP functions (e.g. Floating Point FFT, FIR, Polyphase filterbanks, DDC, sFPDP, and more)
- Video frame grabber and compression algorithm (JPEG, MPEG, etc.)
- Data acquisition and processing
- Radar Signal Processing (Doppler filter, Pulse compression, CFAR)
- Vector processing
- Timing generation
- Embedded processors
- ASIC prototyping
